static void intel_dump_crtc_timings(const struct drm_display_mode *mode)
 {
        DRM_DEBUG_KMS("crtc timings: %d %d %d %d %d %d %d %d %d, "
-                       "type: 0x%x flags: 0x%x\n",
-               mode->crtc_clock,
-               mode->crtc_hdisplay, mode->crtc_hsync_start,
-               mode->crtc_hsync_end, mode->crtc_htotal,
-               mode->crtc_vdisplay, mode->crtc_vsync_start,
-               mode->crtc_vsync_end, mode->crtc_vtotal, mode->type, mode->flags);
+                     "type: 0x%x flags: 0x%x\n",
+                     mode->crtc_clock,
+                     mode->crtc_hdisplay, mode->crtc_hsync_start,
+                     mode->crtc_hsync_end, mode->crtc_htotal,
+                     mode->crtc_vdisplay, mode->crtc_vsync_start,
+                     mode->crtc_vsync_end, mode->crtc_vtotal,
+                     mode->type, mode->flags);
 }
 
 static inline void
-intel_dump_m_n_config(struct intel_crtc_state *pipe_config, char *id,
-                     unsigned int lane_count, struct intel_link_m_n *m_n)
+intel_dump_m_n_config(const struct intel_crtc_state *pipe_config,
+                     const char *id, unsigned int lane_count,
+                     const struct intel_link_m_n *m_n)
 {
        DRM_DEBUG_KMS("%s: lanes: %i; gmch_m: %u, gmch_n: %u, link_m: %u, link_n: %u, tu: %u\n",
                      id, lane_count,
        return output_format_str[format];
 }
 
-static void intel_dump_pipe_config(struct intel_crtc_state *pipe_config,
+static void intel_dump_pipe_config(const struct intel_crtc_state *pipe_config,
                                   const char *context)
 {
        struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);
 
 }
 
 static void ibx_dump_hw_state(struct drm_i915_private *dev_priv,
-                             struct intel_dpll_hw_state *hw_state)
+                             const struct intel_dpll_hw_state *hw_state)
 {
        DRM_DEBUG_KMS("dpll_hw_state: dpll: 0x%x, dpll_md: 0x%x, "
                      "fp0: 0x%x, fp1: 0x%x\n",
 }
 
 static void hsw_dump_hw_state(struct drm_i915_private *dev_priv,
-                             struct intel_dpll_hw_state *hw_state)
+                             const struct intel_dpll_hw_state *hw_state)
 {
        DRM_DEBUG_KMS("dpll_hw_state: wrpll: 0x%x spll: 0x%x\n",
                      hw_state->wrpll, hw_state->spll);
 }
 
 static void skl_dump_hw_state(struct drm_i915_private *dev_priv,
-                             struct intel_dpll_hw_state *hw_state)
+                             const struct intel_dpll_hw_state *hw_state)
 {
        DRM_DEBUG_KMS("dpll_hw_state: "
                      "ctrl1: 0x%x, cfgcr1: 0x%x, cfgcr2: 0x%x\n",
 }
 
 static void bxt_dump_hw_state(struct drm_i915_private *dev_priv,
-                             struct intel_dpll_hw_state *hw_state)
+                             const struct intel_dpll_hw_state *hw_state)
 {
        DRM_DEBUG_KMS("dpll_hw_state: ebb0: 0x%x, ebb4: 0x%x,"
                      "pll0: 0x%x, pll1: 0x%x, pll2: 0x%x, pll3: 0x%x, "
                                              struct intel_encoder *encoder);
 
        void (*dump_hw_state)(struct drm_i915_private *dev_priv,
-                             struct intel_dpll_hw_state *hw_state);
+                             const struct intel_dpll_hw_state *hw_state);
 };
 
 static const struct dpll_info pch_plls[] = {
 }
 
 static void cnl_dump_hw_state(struct drm_i915_private *dev_priv,
-                             struct intel_dpll_hw_state *hw_state)
+                             const struct intel_dpll_hw_state *hw_state)
 {
        DRM_DEBUG_KMS("dpll_hw_state: "
                      "cfgcr0: 0x%x, cfgcr1: 0x%x\n",
 }
 
 static void icl_dump_hw_state(struct drm_i915_private *dev_priv,
-                             struct intel_dpll_hw_state *hw_state)
+                             const struct intel_dpll_hw_state *hw_state)
 {
        DRM_DEBUG_KMS("dpll_hw_state: cfgcr0: 0x%x, cfgcr1: 0x%x, "
                      "mg_refclkin_ctl: 0x%x, hg_clktop2_coreclkctl1: 0x%x, "
  * Write the relevant values in @hw_state to dmesg using DRM_DEBUG_KMS.
  */
 void intel_dpll_dump_hw_state(struct drm_i915_private *dev_priv,
-                             struct intel_dpll_hw_state *hw_state)
+                             const struct intel_dpll_hw_state *hw_state)
 {
        if (dev_priv->dpll_mgr) {
                dev_priv->dpll_mgr->dump_hw_state(dev_priv, hw_state);