KVM: arm64: Honor trap routing for TCR2_EL1

TCR2_EL1 handling is missing the handling of its trap configuration:

- HCRX_EL2.TCR2En must be handled in conjunction with HCR_EL2.{TVM,TRVM}

- HFG{R,W}TR_EL2.TCR_EL1 does apply to TCR2_EL1 as well

Without these two controls being implemented, it is impossible to
correctly route TCR2_EL1 traps.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20240625130042.259175-7-maz@kernel.org
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>

diff --git a/arch/arm64/kvm/emulate-nested.c b/arch/arm64/kvm/emulate-nested.c
index 54090967a33567008da56b9fbef6dd6711756a09..2fa2d5fc37d604e3f9236c6ae9bb9422129d5a5e 100644 (file)
--- a/arch/arm64/kvm/emulate-nested.c
+++ b/arch/arm64/kvm/emulate-nested.c
@@ -79,6 +79,8 @@ enum cgt_group_id {
        CGT_MDCR_E2TB,
        CGT_MDCR_TDCC,
 
+       CGT_HCRX_TCR2En,
+
        /*
         * Anything after this point is a combination of coarse trap
         * controls, which must all be evaluated to decide what to do.
@@ -89,6 +91,7 @@ enum cgt_group_id {
        CGT_HCR_TTLB_TTLBIS,
        CGT_HCR_TTLB_TTLBOS,
        CGT_HCR_TVM_TRVM,
+       CGT_HCR_TVM_TRVM_HCRX_TCR2En,
        CGT_HCR_TPU_TICAB,
        CGT_HCR_TPU_TOCU,
        CGT_HCR_NV1_nNV2_ENSCXT,
@@ -345,6 +348,12 @@ static const struct trap_bits coarse_trap_bits[] = {
                .mask           = MDCR_EL2_TDCC,
                .behaviour      = BEHAVE_FORWARD_ANY,
        },
+       [CGT_HCRX_TCR2En] = {
+               .index          = HCRX_EL2,
+               .value          = 0,
+               .mask           = HCRX_EL2_TCR2En,
+               .behaviour      = BEHAVE_FORWARD_ANY,
+       },
 };
 
 #define MCB(id, ...)                                           \
@@ -359,6 +368,8 @@ static const enum cgt_group_id *coarse_control_combo[] = {
        MCB(CGT_HCR_TTLB_TTLBIS,        CGT_HCR_TTLB, CGT_HCR_TTLBIS),
        MCB(CGT_HCR_TTLB_TTLBOS,        CGT_HCR_TTLB, CGT_HCR_TTLBOS),
        MCB(CGT_HCR_TVM_TRVM,           CGT_HCR_TVM, CGT_HCR_TRVM),
+       MCB(CGT_HCR_TVM_TRVM_HCRX_TCR2En,
+                                       CGT_HCR_TVM, CGT_HCR_TRVM, CGT_HCRX_TCR2En),
        MCB(CGT_HCR_TPU_TICAB,          CGT_HCR_TPU, CGT_HCR_TICAB),
        MCB(CGT_HCR_TPU_TOCU,           CGT_HCR_TPU, CGT_HCR_TOCU),
        MCB(CGT_HCR_NV1_nNV2_ENSCXT,    CGT_HCR_NV1_nNV2, CGT_HCR_ENSCXT),
@@ -622,6 +633,7 @@ static const struct encoding_to_trap_config encoding_to_cgt[] __initconst = {
        SR_TRAP(SYS_MAIR_EL1,           CGT_HCR_TVM_TRVM),
        SR_TRAP(SYS_AMAIR_EL1,          CGT_HCR_TVM_TRVM),
        SR_TRAP(SYS_CONTEXTIDR_EL1,     CGT_HCR_TVM_TRVM),
+       SR_TRAP(SYS_TCR2_EL1,           CGT_HCR_TVM_TRVM_HCRX_TCR2En),
        SR_TRAP(SYS_DC_ZVA,             CGT_HCR_TDZ),
        SR_TRAP(SYS_DC_GVA,             CGT_HCR_TDZ),
        SR_TRAP(SYS_DC_GZVA,            CGT_HCR_TDZ),
@@ -1071,6 +1083,7 @@ static const struct encoding_to_trap_config encoding_to_fgt[] __initconst = {
        SR_FGT(SYS_TPIDRRO_EL0,         HFGxTR, TPIDRRO_EL0, 1),
        SR_FGT(SYS_TPIDR_EL1,           HFGxTR, TPIDR_EL1, 1),
        SR_FGT(SYS_TCR_EL1,             HFGxTR, TCR_EL1, 1),
+       SR_FGT(SYS_TCR2_EL1,            HFGxTR, TCR_EL1, 1),
        SR_FGT(SYS_SCXTNUM_EL0,         HFGxTR, SCXTNUM_EL0, 1),
        SR_FGT(SYS_SCXTNUM_EL1,         HFGxTR, SCXTNUM_EL1, 1),
        SR_FGT(SYS_SCTLR_EL1,           HFGxTR, SCTLR_EL1, 1),