drm/i915/display/tgl: Disable FBC with PSR2

There are some corner cases wrt underrun when we enable
FBC with PSR2 on TGL. Recommendation from hardware is to
keep this combination disabled.

Bspec: 50422 HSD: 14010260002

v2: Added psr2 enabled check from crtc_state (Anshuman)
Added Bspec link and HSD referneces (Jose)

v3: Moved the logic to disable fbc to intel_fbc_update_state_cache
and removed the crtc->config usages, as per Ville's recommendation.

v4: Introduced a variable in fbc state_cache instead of the earlier
plane.visible WA, as suggested by Jose.

v5: Dropped an extra check for fbc in intel_fbc_enable and addressed
review comments by Jose.

v6: Move WA to end of function and added Jose's RB.

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201201190406.1752-2-uma.shankar@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index a5b072816a7b21626eb1ea174a0aa5da20331812..f5d5a648cb224365dc0bcfa2f7c0d3e5a4bb4002 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -742,6 +742,8 @@ static void intel_fbc_update_state_cache(struct intel_crtc *crtc,
                cache->fence_id = plane_state->vma->fence->id;
        else
                cache->fence_id = -1;
+
+       cache->psr2_active = crtc_state->has_psr2;
 }
 
 static bool intel_fbc_cfb_size_changed(struct drm_i915_private *dev_priv)
@@ -914,6 +916,16 @@ static bool intel_fbc_can_activate(struct intel_crtc *crtc)
                return false;
        }
 
+       /*
+        * Tigerlake is not supporting FBC with PSR2.
+        * Recommendation is to keep this combination disabled
+        * Bspec: 50422 HSD: 14010260002
+        */
+       if (fbc->state_cache.psr2_active && IS_TIGERLAKE(dev_priv)) {
+               fbc->no_fbc_reason = "not supported with PSR2";
+               return false;
+       }
+
        return true;
 }
 

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 25af27e3876487477726a8bf430c60f1b71e7c5d..972a52e35fb8b88f361eb14427e8065291d2eaa9 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -416,6 +416,7 @@ struct intel_fbc {
                u16 gen9_wa_cfb_stride;
                u16 interval;
                s8 fence_id;
+               bool psr2_active;
        } state_cache;
 
        /*