msix: msix@fbe00000 {
                        compatible = "al,alpine-msix";
                        reg = <0x0 0xfbe00000 0x0 0x100000>;
-                       interrupt-controller;
                        msi-controller;
                        al,msi-base-spi = <160>;
                        al,msi-num-spis = <160>;
 
                msix: msix@fbe00000 {
                        compatible = "al,alpine-msix";
                        reg = <0x0 0xfbe00000 0x0 0x100000>;
-                       interrupt-controller;
                        msi-controller;
                        al,msi-base-spi = <336>;
                        al,msi-num-spis = <959>;
 
                        #gpio-cells = <2>;
                        gpio-controller;
                        interrupt-controller;
+                       #interrupt-cells = <2>;
                        interrupts = <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>;
                };
 
 
                        #gpio-cells = <2>;
                        gpio-controller;
                        interrupt-controller;
+                       #interrupt-cells = <2>;
                        interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
                        gpio-ranges = <&pinmux 0 0 16>,
                                        <&pinmux 16 71 2>,
 
        amba {
                #address-cells = <2>;
                #size-cells = <1>;
-               #interrupt-cells = <3>;
 
                compatible = "simple-bus";
                interrupt-parent = <&gic>;
 
        amba {
                #address-cells = <2>;
                #size-cells = <1>;
-               #interrupt-cells = <3>;
 
                compatible = "simple-bus";
                interrupt-parent = <&gic>;
 
 
                        odmi: odmi@300000 {
                                compatible = "marvell,odmi-controller";
-                               interrupt-controller;
                                msi-controller;
                                marvell,odmi-frames = <4>;
                                reg = <0x300000 0x4000>,
 
                compatible = "mediatek,mt6360";
                reg = <0x34>;
                interrupt-controller;
+               #interrupt-cells = <1>;
                interrupts-extended = <&pio 101 IRQ_TYPE_EDGE_FALLING>;
                interrupt-names = "IRQB";
 
 
                gpio-controller;
                #gpio-cells = <2>;
                interrupt-controller;
+               #interrupt-cells = <2>;
                interrupt-parent = <&gpio6>;
                interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
 
                gpio-controller;
                #gpio-cells = <2>;
                interrupt-controller;
+               #interrupt-cells = <2>;
                interrupt-parent = <&gpio6>;
                interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
        };
                gpio-controller;
                #gpio-cells = <2>;
                interrupt-controller;
+               #interrupt-cells = <2>;
                interrupt-parent = <&gpio7>;
                interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
        };
                gpio-controller;
                #gpio-cells = <2>;
                interrupt-controller;
+               #interrupt-cells = <2>;
                interrupt-parent = <&gpio5>;
                interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
        };