KVM: selftests: Test that values written to Hyper-V MSRs are preserved

Enhance 'hyperv_features' selftest by adding a check that KVM
preserves values written to PV MSRs. Two MSRs are, however, 'special':
- HV_X64_MSR_EOI as it is a 'write-only' MSR,
- HV_X64_MSR_RESET as it always reads as '0'.
The later doesn't require any special handling right now because the
test never writes anything besides '0' to the MSR, leave a TODO node
about the fact.

Suggested-by: Sean Christopherson <seanjc@google.com>
Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
Reviewed-by: Sean Christopherson <seanjc@google.com>
Message-Id: <20221013095849.705943-7-vkuznets@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

diff --git a/tools/testing/selftests/kvm/x86_64/hyperv_features.c b/tools/testing/selftests/kvm/x86_64/hyperv_features.c
index daad3e3cc7bbae82360ebade3c409b77152ef66b..b0024096397491fd1e7f9b8bdb83b7df63994268 100644 (file)
--- a/tools/testing/selftests/kvm/x86_64/hyperv_features.c
+++ b/tools/testing/selftests/kvm/x86_64/hyperv_features.c
@@ -34,22 +34,36 @@ struct hcall_data {
        bool ud_expected;
 };
 
+static bool is_write_only_msr(uint32_t msr)
+{
+       return msr == HV_X64_MSR_EOI;
+}
+
 static void guest_msr(struct msr_data *msr)
 {
-       uint64_t ignored;
-       uint8_t vector;
+       uint8_t vector = 0;
+       uint64_t msr_val = 0;
 
        GUEST_ASSERT(msr->idx);
 
-       if (!msr->write)
-               vector = rdmsr_safe(msr->idx, &ignored);
-       else
+       if (msr->write)
                vector = wrmsr_safe(msr->idx, msr->write_val);
 
+       if (!vector && (!msr->write || !is_write_only_msr(msr->idx)))
+               vector = rdmsr_safe(msr->idx, &msr_val);
+
        if (msr->fault_expected)
-               GUEST_ASSERT_2(vector == GP_VECTOR, msr->idx, vector);
+               GUEST_ASSERT_3(vector == GP_VECTOR, msr->idx, vector, GP_VECTOR);
        else
-               GUEST_ASSERT_2(!vector, msr->idx, vector);
+               GUEST_ASSERT_3(!vector, msr->idx, vector, 0);
+
+       if (vector || is_write_only_msr(msr->idx))
+               goto done;
+
+       if (msr->write)
+               GUEST_ASSERT_3(msr_val == msr->write_val, msr->idx,
+                              msr_val, msr->write_val);
+done:
        GUEST_DONE();
 }
 
@@ -239,6 +253,12 @@ static void guest_test_msrs_access(void)
                case 16:
                        msr->idx = HV_X64_MSR_RESET;
                        msr->write = true;
+                       /*
+                        * TODO: the test only writes '0' to HV_X64_MSR_RESET
+                        * at the moment, writing some other value there will
+                        * trigger real vCPU reset and the code is not prepared
+                        * to handle it yet.
+                        */
                        msr->write_val = 0;
                        msr->fault_expected = false;
                        break;
@@ -433,7 +453,7 @@ static void guest_test_msrs_access(void)
 
                switch (get_ucall(vcpu, &uc)) {
                case UCALL_ABORT:
-                       REPORT_GUEST_ASSERT_2(uc, "MSR = %lx, vector = %lx");
+                       REPORT_GUEST_ASSERT_3(uc, "MSR = %lx, arg1 = %lx, arg2 = %lx");
                        return;
                case UCALL_DONE:
                        break;