ASoC: rt5682: move DAI clock registry to I2S mode

The SoundWire mode doesn't need the DAI clocks.
Therefore, the DAI clock registry moves to I2S mode case.

Signed-off-by: Shuming Fan <shumingf@realtek.com>
Link: https://lore.kernel.org/r/20200327073849.18291-1-shumingf@realtek.com
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/sound/soc/codecs/rt5682.c b/sound/soc/codecs/rt5682.c
index 923541a52504e79998a0d72d1a051af6bcbf44a8..ce4fe7a683f93f8fc28de2673fa7fc559deabec9 100644 (file)
--- a/sound/soc/codecs/rt5682.c
+++ b/sound/soc/codecs/rt5682.c
@@ -2856,26 +2856,6 @@ static int rt5682_probe(struct snd_soc_component *component)
 #endif
        rt5682->component = component;
 
-#ifdef CONFIG_COMMON_CLK
-       /* Check if MCLK provided */
-       rt5682->mclk = devm_clk_get(component->dev, "mclk");
-       if (IS_ERR(rt5682->mclk)) {
-               if (PTR_ERR(rt5682->mclk) != -ENOENT) {
-                       ret = PTR_ERR(rt5682->mclk);
-                       return ret;
-               }
-               rt5682->mclk = NULL;
-       }
-
-       /* Register CCF DAI clock control */
-       ret = rt5682_register_dai_clks(component);
-       if (ret)
-               return ret;
-
-       /* Initial setup for CCF */
-       rt5682->lrck[RT5682_AIF1] = CLK_48;
-#endif
-
        if (rt5682->is_sdw) {
                slave = rt5682->slave;
                time = wait_for_completion_timeout(
@@ -2885,6 +2865,25 @@ static int rt5682_probe(struct snd_soc_component *component)
                        dev_err(&slave->dev, "Initialization not complete, timed out\n");
                        return -ETIMEDOUT;
                }
+       } else {
+#ifdef CONFIG_COMMON_CLK
+               /* Check if MCLK provided */
+               rt5682->mclk = devm_clk_get(component->dev, "mclk");
+               if (IS_ERR(rt5682->mclk)) {
+                       if (PTR_ERR(rt5682->mclk) != -ENOENT) {
+                               ret = PTR_ERR(rt5682->mclk);
+                               return ret;
+                       }
+                       rt5682->mclk = NULL;
+               } else {
+                       /* Register CCF DAI clock control */
+                       ret = rt5682_register_dai_clks(component);
+                       if (ret)
+                               return ret;
+               }
+               /* Initial setup for CCF */
+               rt5682->lrck[RT5682_AIF1] = CLK_48;
+#endif
        }
 
        return 0;