e1000e: Add support for Comet Lake

Add devices ID's for the next LOM generations that will be
available on the next Intel Client platform (Comet Lake)
This patch provides the initial support for these devices

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>

diff --git a/drivers/net/ethernet/intel/e1000e/hw.h b/drivers/net/ethernet/intel/e1000e/hw.h
index eff75bd8a8f0b9dc08a17f3c5a36b2515c31f0cf..11fdc27faa82b82b09a4d8e664bbb15a05c6130a 100644 (file)
--- a/drivers/net/ethernet/intel/e1000e/hw.h
+++ b/drivers/net/ethernet/intel/e1000e/hw.h
@@ -86,6 +86,12 @@ struct e1000_hw;
 #define E1000_DEV_ID_PCH_ICP_I219_V8           0x15E0
 #define E1000_DEV_ID_PCH_ICP_I219_LM9          0x15E1
 #define E1000_DEV_ID_PCH_ICP_I219_V9           0x15E2
+#define E1000_DEV_ID_PCH_CMP_I219_LM10         0x0D4E
+#define E1000_DEV_ID_PCH_CMP_I219_V10          0x0D4F
+#define E1000_DEV_ID_PCH_CMP_I219_LM11         0x0D4C
+#define E1000_DEV_ID_PCH_CMP_I219_V11          0x0D4D
+#define E1000_DEV_ID_PCH_CMP_I219_LM12         0x0D53
+#define E1000_DEV_ID_PCH_CMP_I219_V12          0x0D55
 
 #define E1000_REVISION_4       4
 

diff --git a/drivers/net/ethernet/intel/e1000e/netdev.c b/drivers/net/ethernet/intel/e1000e/netdev.c
index 42f57ab8fb8eb9dbe4e97263bbc82b4fdc148bf5..731e1b3e103a156ee55138e8acbdce3738930404 100644 (file)
--- a/drivers/net/ethernet/intel/e1000e/netdev.c
+++ b/drivers/net/ethernet/intel/e1000e/netdev.c
@@ -7749,6 +7749,12 @@ static const struct pci_device_id e1000_pci_tbl[] = {
        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_V8), board_pch_cnp },
        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_LM9), board_pch_cnp },
        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_V9), board_pch_cnp },
+       { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_LM10), board_pch_cnp },
+       { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_V10), board_pch_cnp },
+       { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_LM11), board_pch_cnp },
+       { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_V11), board_pch_cnp },
+       { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_LM12), board_pch_spt },
+       { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_V12), board_pch_spt },
 
        { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */
 };