drm/i915/intel_i2c: reuse GMBUS2 value read in polling loop

Save the GMBUS2 value read while polling for state changes, and then
reuse this value when determining for which reason the loops were exited.
This is a small optimization which saves a couple of bus accesses for
memory mapped IO registers.

To avoid "assigning in if clause" checkpatch errors", use a ret variable
to store the wait_for macro return value.

Signed-off-by: Daniel Kurtz <djkurtz@chromium.org>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
index 5e0912a4a7377a5d3efee21184c072f95e8946dd..c56cc350c9cfc0d2672c27706a4bf7cd4db2e13c 100644 (file)
--- a/drivers/gpu/drm/i915/intel_i2c.c
+++ b/drivers/gpu/drm/i915/intel_i2c.c
@@ -219,13 +219,16 @@ gmbus_xfer_read(struct drm_i915_private *dev_priv, struct i2c_msg *msg,
                   GMBUS_SLAVE_READ | GMBUS_SW_RDY);
        POSTING_READ(GMBUS2 + reg_offset);
        do {
+               int ret;
                u32 val, loop = 0;
+               u32 gmbus2;
 
-               if (wait_for(I915_READ(GMBUS2 + reg_offset) &
-                            (GMBUS_SATOER | GMBUS_HW_RDY),
-                            50))
+               ret = wait_for((gmbus2 = I915_READ(GMBUS2 + reg_offset)) &
+                              (GMBUS_SATOER | GMBUS_HW_RDY),
+                              50);
+               if (ret)
                        return -ETIMEDOUT;
-               if (I915_READ(GMBUS2 + reg_offset) & GMBUS_SATOER)
+               if (gmbus2 & GMBUS_SATOER)
                        return -ENXIO;
 
                val = I915_READ(GMBUS3 + reg_offset);
@@ -260,6 +263,9 @@ gmbus_xfer_write(struct drm_i915_private *dev_priv, struct i2c_msg *msg)
                   GMBUS_SLAVE_WRITE | GMBUS_SW_RDY);
        POSTING_READ(GMBUS2 + reg_offset);
        while (len) {
+               int ret;
+               u32 gmbus2;
+
                val = loop = 0;
                do {
                        val |= *buf++ << (8 * loop);
@@ -268,11 +274,12 @@ gmbus_xfer_write(struct drm_i915_private *dev_priv, struct i2c_msg *msg)
                I915_WRITE(GMBUS3 + reg_offset, val);
                POSTING_READ(GMBUS2 + reg_offset);
 
-               if (wait_for(I915_READ(GMBUS2 + reg_offset) &
-                            (GMBUS_SATOER | GMBUS_HW_RDY),
-                            50))
+               ret = wait_for((gmbus2 = I915_READ(GMBUS2 + reg_offset)) &
+                              (GMBUS_SATOER | GMBUS_HW_RDY),
+                              50);
+               if (ret)
                        return -ETIMEDOUT;
-               if (I915_READ(GMBUS2 + reg_offset) & GMBUS_SATOER)
+               if (gmbus2 & GMBUS_SATOER)
                        return -ENXIO;
        }
        return 0;
@@ -342,6 +349,8 @@ gmbus_xfer(struct i2c_adapter *adapter,
        I915_WRITE(GMBUS0 + reg_offset, bus->reg0);
 
        for (i = 0; i < num; i++) {
+               u32 gmbus2;
+
                if (gmbus_is_index_read(msgs, i, num)) {
                        ret = gmbus_xfer_index_read(dev_priv, &msgs[i]);
                        i += 1;  /* set i to the index of the read xfer */
@@ -356,11 +365,12 @@ gmbus_xfer(struct i2c_adapter *adapter,
                if (ret == -ENXIO)
                        goto clear_err;
 
-               if (wait_for(I915_READ(GMBUS2 + reg_offset) &
-                            (GMBUS_SATOER | GMBUS_HW_WAIT_PHASE),
-                            50))
+               ret = wait_for((gmbus2 = I915_READ(GMBUS2 + reg_offset)) &
+                              (GMBUS_SATOER | GMBUS_HW_WAIT_PHASE),
+                              50);
+               if (ret)
                        goto timeout;
-               if (I915_READ(GMBUS2 + reg_offset) & GMBUS_SATOER)
+               if (gmbus2 & GMBUS_SATOER)
                        goto clear_err;
        }