drm/vc4: hdmi: Add a set_timings callback

Similarly to the previous patches, the timings setup in the HDMI controller
of the BCM2711 is slightly different, mostly because it supports higher
resolutions and thus needed more spaces for the various timings, resulting
in the register layout changing.

Let's add a callback for that as well.

Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Tested-by: Chanwoo Choi <cw00.choi@samsung.com>
Tested-by: Hoegeun Kwon <hoegeun.kwon@samsung.com>
Tested-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Link: https://patchwork.freedesktop.org/patch/msgid/0cfcbb379212f90b4abc76c0ccf3b90d1d7c0268.1599120059.git-series.maxime@cerno.tech

diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index 532618e0239985454acba53d6dfd223ca7bfb9ed..9e2bc6cb690e77954e673e001b2ee4eb4d07327f 100644 (file)
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
@@ -369,12 +369,9 @@ static void vc4_hdmi_csc_setup(struct vc4_hdmi *vc4_hdmi, bool enable)
        HDMI_WRITE(HDMI_CSC_CTL, csc_ctl);
 }
 
-static void vc4_hdmi_encoder_enable(struct drm_encoder *encoder)
+static void vc4_hdmi_set_timings(struct vc4_hdmi *vc4_hdmi,
+                                struct drm_display_mode *mode)
 {
-       struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode;
-       struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
-       struct vc4_hdmi_encoder *vc4_encoder = &vc4_hdmi->encoder;
-       bool debug_dump_regs = false;
        bool hsync_pos = mode->flags & DRM_MODE_FLAG_PHSYNC;
        bool vsync_pos = mode->flags & DRM_MODE_FLAG_PVSYNC;
        bool interlaced = mode->flags & DRM_MODE_FLAG_INTERLACE;
@@ -392,6 +389,41 @@ static void vc4_hdmi_encoder_enable(struct drm_encoder *encoder)
                                        mode->crtc_vsync_end -
                                        interlaced,
                                        VC4_HDMI_VERTB_VBP));
+
+       HDMI_WRITE(HDMI_HORZA,
+                  (vsync_pos ? VC4_HDMI_HORZA_VPOS : 0) |
+                  (hsync_pos ? VC4_HDMI_HORZA_HPOS : 0) |
+                  VC4_SET_FIELD(mode->hdisplay * pixel_rep,
+                                VC4_HDMI_HORZA_HAP));
+
+       HDMI_WRITE(HDMI_HORZB,
+                  VC4_SET_FIELD((mode->htotal -
+                                 mode->hsync_end) * pixel_rep,
+                                VC4_HDMI_HORZB_HBP) |
+                  VC4_SET_FIELD((mode->hsync_end -
+                                 mode->hsync_start) * pixel_rep,
+                                VC4_HDMI_HORZB_HSP) |
+                  VC4_SET_FIELD((mode->hsync_start -
+                                 mode->hdisplay) * pixel_rep,
+                                VC4_HDMI_HORZB_HFP));
+
+       HDMI_WRITE(HDMI_VERTA0, verta);
+       HDMI_WRITE(HDMI_VERTA1, verta);
+
+       HDMI_WRITE(HDMI_VERTB0, vertb_even);
+       HDMI_WRITE(HDMI_VERTB1, vertb);
+
+       HDMI_WRITE(HDMI_VID_CTL,
+                  (vsync_pos ? 0 : VC4_HD_VID_CTL_VSYNC_LOW) |
+                  (hsync_pos ? 0 : VC4_HD_VID_CTL_HSYNC_LOW));
+}
+
+static void vc4_hdmi_encoder_enable(struct drm_encoder *encoder)
+{
+       struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode;
+       struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
+       struct vc4_hdmi_encoder *vc4_encoder = to_vc4_hdmi_encoder(encoder);
+       bool debug_dump_regs = false;
        int ret;
 
        ret = pm_runtime_get_sync(&vc4_hdmi->pdev->dev);
@@ -435,33 +467,8 @@ static void vc4_hdmi_encoder_enable(struct drm_encoder *encoder)
                   VC4_HDMI_SCHEDULER_CONTROL_MANUAL_FORMAT |
                   VC4_HDMI_SCHEDULER_CONTROL_IGNORE_VSYNC_PREDICTS);
 
-       HDMI_WRITE(HDMI_HORZA,
-                  (vsync_pos ? VC4_HDMI_HORZA_VPOS : 0) |
-                  (hsync_pos ? VC4_HDMI_HORZA_HPOS : 0) |
-                  VC4_SET_FIELD(mode->hdisplay * pixel_rep,
-                                VC4_HDMI_HORZA_HAP));
-
-       HDMI_WRITE(HDMI_HORZB,
-                  VC4_SET_FIELD((mode->htotal -
-                                 mode->hsync_end) * pixel_rep,
-                                VC4_HDMI_HORZB_HBP) |
-                  VC4_SET_FIELD((mode->hsync_end -
-                                 mode->hsync_start) * pixel_rep,
-                                VC4_HDMI_HORZB_HSP) |
-                  VC4_SET_FIELD((mode->hsync_start -
-                                 mode->hdisplay) * pixel_rep,
-                                VC4_HDMI_HORZB_HFP));
-
-       HDMI_WRITE(HDMI_VERTA0, verta);
-       HDMI_WRITE(HDMI_VERTA1, verta);
-
-       HDMI_WRITE(HDMI_VERTB0, vertb_even);
-       HDMI_WRITE(HDMI_VERTB1, vertb);
-
-       HDMI_WRITE(HDMI_VID_CTL,
-                  (vsync_pos ? 0 : VC4_HD_VID_CTL_VSYNC_LOW) |
-                  (hsync_pos ? 0 : VC4_HD_VID_CTL_HSYNC_LOW));
-
+       if (vc4_hdmi->variant->set_timings)
+               vc4_hdmi->variant->set_timings(vc4_hdmi, mode);
 
        if (vc4_encoder->hdmi_monitor &&
            drm_default_rgb_quant_range(mode) == HDMI_QUANTIZATION_RANGE_LIMITED) {
@@ -1445,6 +1452,7 @@ static const struct vc4_hdmi_variant bcm2835_variant = {
        .init_resources         = vc4_hdmi_init_resources,
        .csc_setup              = vc4_hdmi_csc_setup,
        .reset                  = vc4_hdmi_reset,
+       .set_timings            = vc4_hdmi_set_timings,
        .phy_init               = vc4_hdmi_phy_init,
        .phy_disable            = vc4_hdmi_phy_disable,
        .phy_rng_enable         = vc4_hdmi_phy_rng_enable,

diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.h b/drivers/gpu/drm/vc4/vc4_hdmi.h
index c8fd58548ea2b4eb8d4bb48d5d840627906e71c6..0c32dc46d289a2a2be5c49b5e9a5eb909b616b11 100644 (file)
--- a/drivers/gpu/drm/vc4/vc4_hdmi.h
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.h
@@ -44,6 +44,10 @@ struct vc4_hdmi_variant {
        /* Callback to enable / disable the CSC */
        void (*csc_setup)(struct vc4_hdmi *vc4_hdmi, bool enable);
 
+       /* Callback to configure the video timings in the HDMI block */
+       void (*set_timings)(struct vc4_hdmi *vc4_hdmi,
+                           struct drm_display_mode *mode);
+
        /* Callback to initialize the PHY according to the mode */
        void (*phy_init)(struct vc4_hdmi *vc4_hdmi,
                         struct drm_display_mode *mode);