static struct vbt_header *oprom_get_vbt(struct drm_i915_private *dev_priv)
 {
-       struct pci_dev *pdev = dev_priv->drm.pdev;
+       struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
        void __iomem *p = NULL, *oprom;
        struct vbt_header *vbt;
        u16 vbt_size;
 
 static void i85x_get_cdclk(struct drm_i915_private *dev_priv,
                           struct intel_cdclk_config *cdclk_config)
 {
-       struct pci_dev *pdev = dev_priv->drm.pdev;
+       struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
        u16 hpllcc = 0;
 
        /*
 static void i915gm_get_cdclk(struct drm_i915_private *dev_priv,
                             struct intel_cdclk_config *cdclk_config)
 {
-       struct pci_dev *pdev = dev_priv->drm.pdev;
+       struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
        u16 gcfgc = 0;
 
        pci_read_config_word(pdev, GCFGC, &gcfgc);
 static void i945gm_get_cdclk(struct drm_i915_private *dev_priv,
                             struct intel_cdclk_config *cdclk_config)
 {
-       struct pci_dev *pdev = dev_priv->drm.pdev;
+       struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
        u16 gcfgc = 0;
 
        pci_read_config_word(pdev, GCFGC, &gcfgc);
 static void g33_get_cdclk(struct drm_i915_private *dev_priv,
                          struct intel_cdclk_config *cdclk_config)
 {
-       struct pci_dev *pdev = dev_priv->drm.pdev;
+       struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
        static const u8 div_3200[] = { 12, 10,  8,  7, 5, 16 };
        static const u8 div_4000[] = { 14, 12, 10,  8, 6, 20 };
        static const u8 div_4800[] = { 20, 14, 12, 10, 8, 24 };
 static void pnv_get_cdclk(struct drm_i915_private *dev_priv,
                          struct intel_cdclk_config *cdclk_config)
 {
-       struct pci_dev *pdev = dev_priv->drm.pdev;
+       struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
        u16 gcfgc = 0;
 
        pci_read_config_word(pdev, GCFGC, &gcfgc);
 static void i965gm_get_cdclk(struct drm_i915_private *dev_priv,
                             struct intel_cdclk_config *cdclk_config)
 {
-       struct pci_dev *pdev = dev_priv->drm.pdev;
+       struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
        static const u8 div_3200[] = { 16, 10,  8 };
        static const u8 div_4000[] = { 20, 12, 10 };
        static const u8 div_5333[] = { 24, 16, 14 };
 static void gm45_get_cdclk(struct drm_i915_private *dev_priv,
                           struct intel_cdclk_config *cdclk_config)
 {
-       struct pci_dev *pdev = dev_priv->drm.pdev;
+       struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
        unsigned int cdclk_sel;
        u16 tmp = 0;
 
 
        dev_priv = container_of(work, typeof(*dev_priv), csr.work);
        csr = &dev_priv->csr;
 
-       request_firmware(&fw, dev_priv->csr.fw_path, &dev_priv->drm.pdev->dev);
+       request_firmware(&fw, dev_priv->csr.fw_path, dev_priv->drm.dev);
        parse_csr_fw(dev_priv, fw);
 
        if (dev_priv->csr.dmc_payload) {
 
                                  const u16 slave_addr)
 {
        struct drm_device *drm_dev = intel_dsi->base.base.dev;
-       struct device *dev = &drm_dev->pdev->dev;
+       struct device *dev = drm_dev->dev;
        struct acpi_device *acpi_dev;
        struct list_head resource_list;
        struct i2c_adapter_lookup lookup;
 
        struct intel_framebuffer *intel_fb = ifbdev->fb;
        struct drm_device *dev = helper->dev;
        struct drm_i915_private *dev_priv = to_i915(dev);
-       struct pci_dev *pdev = dev_priv->drm.pdev;
+       struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
        struct i915_ggtt *ggtt = &dev_priv->ggtt;
        const struct i915_ggtt_view view = {
                .type = I915_GGTT_VIEW_NORMAL,
 
  */
 int intel_gmbus_setup(struct drm_i915_private *dev_priv)
 {
-       struct pci_dev *pdev = dev_priv->drm.pdev;
+       struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
        struct intel_gmbus *bus;
        unsigned int pin;
        int ret;
 
 lpe_audio_platdev_create(struct drm_i915_private *dev_priv)
 {
        struct drm_device *dev = &dev_priv->drm;
+       struct pci_dev *pdev = to_pci_dev(dev->dev);
        struct platform_device_info pinfo = {};
        struct resource *rsc;
        struct platform_device *platdev;
        rsc[0].flags    = IORESOURCE_IRQ;
        rsc[0].name     = "hdmi-lpe-audio-irq";
 
-       rsc[1].start    = pci_resource_start(dev->pdev, 0) +
+       rsc[1].start    = pci_resource_start(pdev, 0) +
                I915_HDMI_LPE_AUDIO_BASE;
-       rsc[1].end      = pci_resource_start(dev->pdev, 0) +
+       rsc[1].end      = pci_resource_start(pdev, 0) +
                I915_HDMI_LPE_AUDIO_BASE + I915_HDMI_LPE_AUDIO_SIZE - 1;
        rsc[1].flags    = IORESOURCE_MEM;
        rsc[1].name     = "hdmi-lpe-audio-mmio";
 
                 u32 function, u32 parm, u32 *parm_out)
 {
        struct opregion_swsci *swsci = dev_priv->opregion.swsci;
-       struct pci_dev *pdev = dev_priv->drm.pdev;
+       struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
        u32 main_function, sub_function, scic;
        u16 swsci_val;
        u32 dslp;
        if (!name || !*name)
                return -ENOENT;
 
-       ret = request_firmware(&fw, name, &dev_priv->drm.pdev->dev);
+       ret = request_firmware(&fw, name, dev_priv->drm.dev);
        if (ret) {
                drm_err(&dev_priv->drm,
                        "Requesting VBT firmware \"%s\" failed (%d)\n",
 int intel_opregion_setup(struct drm_i915_private *dev_priv)
 {
        struct intel_opregion *opregion = &dev_priv->opregion;
-       struct pci_dev *pdev = dev_priv->drm.pdev;
+       struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
        u32 asls, mboxes;
        char buf[sizeof(OPREGION_SIGNATURE)];
        int err = 0;
 
 static void i830_overlay_clock_gating(struct drm_i915_private *dev_priv,
                                      bool enable)
 {
-       struct pci_dev *pdev = dev_priv->drm.pdev;
+       struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
        u8 val;
 
        /* WA_OVERLAY_CLKGATE:alm */
 
        if (panel->backlight.combination_mode) {
                u8 lbpc;
 
-               pci_read_config_byte(dev_priv->drm.pdev, LBPC, &lbpc);
+               pci_read_config_byte(to_pci_dev(dev_priv->drm.dev), LBPC, &lbpc);
                val *= lbpc;
        }
 
 
                lbpc = level * 0xfe / panel->backlight.max + 1;
                level /= lbpc;
-               pci_write_config_byte(dev_priv->drm.pdev, LBPC, lbpc);
+               pci_write_config_byte(to_pci_dev(dev_priv->drm.dev), LBPC, lbpc);
        }
 
        if (IS_GEN(dev_priv, 4)) {
 
 
 void intel_init_quirks(struct drm_i915_private *i915)
 {
-       struct pci_dev *d = i915->drm.pdev;
+       struct pci_dev *d = to_pci_dev(i915->drm.dev);
        int i;
 
        for (i = 0; i < ARRAY_SIZE(intel_quirks); i++) {
 
 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
                          struct drm_i915_private *dev_priv)
 {
-       struct pci_dev *pdev = dev_priv->drm.pdev;
+       struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
 
        sdvo->ddc.owner = THIS_MODULE;
        sdvo->ddc.class = I2C_CLASS_DDC;
 
 /* Disable the VGA plane that we never use */
 void intel_vga_disable(struct drm_i915_private *dev_priv)
 {
-       struct pci_dev *pdev = dev_priv->drm.pdev;
+       struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
        i915_reg_t vga_reg = intel_vga_cntrl_reg(dev_priv);
        u8 sr1;
 
 
 void intel_vga_reset_io_mem(struct drm_i915_private *i915)
 {
-       struct pci_dev *pdev = i915->drm.pdev;
+       struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
 
        /*
         * After we re-enable the power well, if we touch VGA register 0x3d5
 
 int intel_vga_register(struct drm_i915_private *i915)
 {
-       struct pci_dev *pdev = i915->drm.pdev;
+       struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
        int ret;
 
        /*
 
 void intel_vga_unregister(struct drm_i915_private *i915)
 {
-       struct pci_dev *pdev = i915->drm.pdev;
+       struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
 
        vga_client_register(pdev, NULL, NULL, NULL);
 }
 
         * to handle all possible callers, and given typical object sizes,
         * the alignment of the buddy allocation will naturally match.
         */
-       vaddr = dma_alloc_coherent(&obj->base.dev->pdev->dev,
+       vaddr = dma_alloc_coherent(obj->base.dev->dev,
                                   roundup_pow_of_two(obj->base.size),
                                   &dma, GFP_KERNEL);
        if (!vaddr)
 err_st:
        kfree(st);
 err_pci:
-       dma_free_coherent(&obj->base.dev->pdev->dev,
+       dma_free_coherent(obj->base.dev->dev,
                          roundup_pow_of_two(obj->base.size),
                          vaddr, dma);
        return -ENOMEM;
        sg_free_table(pages);
        kfree(pages);
 
-       dma_free_coherent(&obj->base.dev->pdev->dev,
+       dma_free_coherent(obj->base.dev->dev,
                          roundup_pow_of_two(obj->base.size),
                          vaddr, dma);
 }
 
                        max_segment = PAGE_SIZE;
                        goto rebuild_st;
                } else {
-                       dev_warn(&i915->drm.pdev->dev,
+                       dev_warn(i915->drm.dev,
                                 "Failed to DMA remap %lu pages\n",
                                 page_count);
                        goto err_pages;
 
        if (ret)
                return ret;
 
-       mem->remap_addr = dma_map_resource(&i915->drm.pdev->dev,
+       mem->remap_addr = dma_map_resource(i915->drm.dev,
                                           mem->region.start,
                                           mem->fake_mappable.size,
                                           PCI_DMA_BIDIRECTIONAL,
                                           DMA_ATTR_FORCE_CONTIGUOUS);
-       if (dma_mapping_error(&i915->drm.pdev->dev, mem->remap_addr)) {
+       if (dma_mapping_error(i915->drm.dev, mem->remap_addr)) {
                drm_mm_remove_node(&mem->fake_mappable);
                return -EINVAL;
        }
 
        drm_mm_remove_node(&mem->fake_mappable);
 
-       dma_unmap_resource(&mem->i915->drm.pdev->dev,
+       dma_unmap_resource(mem->i915->drm.dev,
                           mem->remap_addr,
                           mem->fake_mappable.size,
                           PCI_DMA_BIDIRECTIONAL,
 struct intel_memory_region *
 intel_setup_fake_lmem(struct drm_i915_private *i915)
 {
-       struct pci_dev *pdev = i915->drm.pdev;
+       struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
        struct intel_memory_region *mem;
        resource_size_t mappable_end;
        resource_size_t io_start;
 
 static int i915_runtime_pm_status(struct seq_file *m, void *unused)
 {
        struct drm_i915_private *dev_priv = node_to_i915(m->private);
-       struct pci_dev *pdev = dev_priv->drm.pdev;
+       struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
 
        if (!HAS_RUNTIME_PM(dev_priv))
                seq_puts(m, "Runtime power management not supported\n");
 
 
 static int i915_get_bridge_dev(struct drm_i915_private *dev_priv)
 {
-       int domain = pci_domain_nr(dev_priv->drm.pdev->bus);
+       int domain = pci_domain_nr(to_pci_dev(dev_priv->drm.dev)->bus);
 
        dev_priv->bridge_dev =
                pci_get_domain_bus_and_slot(domain, 0, PCI_DEVFN(0, 0));
  */
 static int i915_set_dma_info(struct drm_i915_private *i915)
 {
-       struct pci_dev *pdev = i915->drm.pdev;
        unsigned int mask_size = INTEL_INFO(i915)->dma_mask_size;
        int ret;
 
         * We don't have a max segment size, so set it to the max so sg's
         * debugging layer doesn't complain
         */
-       dma_set_max_seg_size(&pdev->dev, UINT_MAX);
+       dma_set_max_seg_size(i915->drm.dev, UINT_MAX);
 
-       ret = dma_set_mask(&pdev->dev, DMA_BIT_MASK(mask_size));
+       ret = dma_set_mask(i915->drm.dev, DMA_BIT_MASK(mask_size));
        if (ret)
                goto mask_err;
 
        if (IS_I965G(i915) || IS_I965GM(i915))
                mask_size = 32;
 
-       ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(mask_size));
+       ret = dma_set_coherent_mask(i915->drm.dev, DMA_BIT_MASK(mask_size));
        if (ret)
                goto mask_err;
 
  */
 static int i915_driver_hw_probe(struct drm_i915_private *dev_priv)
 {
-       struct pci_dev *pdev = dev_priv->drm.pdev;
+       struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
        int ret;
 
        if (i915_inject_probe_failure(dev_priv))
  */
 static void i915_driver_hw_remove(struct drm_i915_private *dev_priv)
 {
-       struct pci_dev *pdev = dev_priv->drm.pdev;
+       struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
 
        i915_perf_fini(dev_priv);
 
 static int i915_drm_suspend(struct drm_device *dev)
 {
        struct drm_i915_private *dev_priv = to_i915(dev);
-       struct pci_dev *pdev = dev_priv->drm.pdev;
+       struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
        pci_power_t opregion_target_state;
 
        disable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
 static int i915_drm_suspend_late(struct drm_device *dev, bool hibernation)
 {
        struct drm_i915_private *dev_priv = to_i915(dev);
-       struct pci_dev *pdev = dev_priv->drm.pdev;
+       struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
        struct intel_runtime_pm *rpm = &dev_priv->runtime_pm;
        int ret;
 
 static int i915_drm_resume_early(struct drm_device *dev)
 {
        struct drm_i915_private *dev_priv = to_i915(dev);
-       struct pci_dev *pdev = dev_priv->drm.pdev;
+       struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
        int ret;
 
        /*
 
 #define INTEL_DEVID(dev_priv)  (RUNTIME_INFO(dev_priv)->device_id)
 
 #define REVID_FOREVER          0xff
-#define INTEL_REVID(dev_priv)  ((dev_priv)->drm.pdev->revision)
+#define INTEL_REVID(dev_priv)  (to_pci_dev((dev_priv)->drm.dev)->revision)
 
 #define INTEL_GEN_MASK(s, e) ( \
        BUILD_BUG_ON_ZERO(!__builtin_constant_p(s)) + \
 
                               struct sg_table *pages)
 {
        do {
-               if (dma_map_sg_attrs(&obj->base.dev->pdev->dev,
+               if (dma_map_sg_attrs(obj->base.dev->dev,
                                     pages->sgl, pages->nents,
                                     PCI_DMA_BIDIRECTIONAL,
                                     DMA_ATTR_SKIP_CPU_SYNC |
                /* Wait a bit, in the hope it avoids the hang */
                usleep_range(100, 250);
 
-       dma_unmap_sg(&i915->drm.pdev->dev,
-                    pages->sgl, pages->nents,
+       dma_unmap_sg(i915->drm.dev, pages->sgl, pages->nents,
                     PCI_DMA_BIDIRECTIONAL);
 }
 
 
                        struct drm_file *file_priv)
 {
        struct drm_i915_private *i915 = to_i915(dev);
+       struct pci_dev *pdev = to_pci_dev(dev->dev);
        const struct sseu_dev_info *sseu = &i915->gt.info.sseu;
        drm_i915_getparam_t *param = data;
        int value;
                /* Reject all old ums/dri params. */
                return -ENODEV;
        case I915_PARAM_CHIPSET_ID:
-               value = i915->drm.pdev->device;
+               value = pdev->device;
                break;
        case I915_PARAM_REVISION:
-               value = i915->drm.pdev->revision;
+               value = pdev->revision;
                break;
        case I915_PARAM_NUM_FENCES_AVAIL:
                value = i915->ggtt.num_fences;
 
 static void err_print_pciid(struct drm_i915_error_state_buf *m,
                            struct drm_i915_private *i915)
 {
-       struct pci_dev *pdev = i915->drm.pdev;
+       struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
 
        err_printf(m, "PCI ID: 0x%04x\n", pdev->device);
        err_printf(m, "PCI Revision: 0x%02x\n", pdev->revision);
 
  */
 int intel_irq_install(struct drm_i915_private *dev_priv)
 {
-       int irq = dev_priv->drm.pdev->irq;
+       int irq = to_pci_dev(dev_priv->drm.dev)->irq;
        int ret;
 
        /*
  */
 void intel_irq_uninstall(struct drm_i915_private *dev_priv)
 {
-       int irq = dev_priv->drm.pdev->irq;
+       int irq = to_pci_dev(dev_priv->drm.dev)->irq;
 
        /*
         * FIXME we can get called twice during driver probe
 
 void intel_synchronize_irq(struct drm_i915_private *i915)
 {
-       synchronize_irq(i915->drm.pdev->irq);
+       synchronize_irq(to_pci_dev(i915->drm.dev)->irq);
 }
 
 
 static bool is_igp(struct drm_i915_private *i915)
 {
-       struct pci_dev *pdev = i915->drm.pdev;
+       struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
 
        /* IGP is 0000:00:02.0 */
        return pci_domain_nr(pdev->bus) == 0 &&
 
 
 void i915_save_display(struct drm_i915_private *dev_priv)
 {
-       struct pci_dev *pdev = dev_priv->drm.pdev;
+       struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
 
        /* Display arbitration control */
        if (INTEL_GEN(dev_priv) <= 4)
 
 void i915_restore_display(struct drm_i915_private *dev_priv)
 {
-       struct pci_dev *pdev = dev_priv->drm.pdev;
+       struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
 
        intel_restore_swf(dev_priv);
 
 
 
 int i915_switcheroo_register(struct drm_i915_private *i915)
 {
-       struct pci_dev *pdev = i915->drm.pdev;
+       struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
 
        return vga_switcheroo_register_client(pdev, &i915_switcheroo_ops, false);
 }
 
 void i915_switcheroo_unregister(struct drm_i915_private *i915)
 {
-       struct pci_dev *pdev = i915->drm.pdev;
+       struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
 
        vga_switcheroo_unregister_client(pdev);
 }
 
  */
 void intel_vgpu_detect(struct drm_i915_private *dev_priv)
 {
-       struct pci_dev *pdev = dev_priv->drm.pdev;
+       struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
        u64 magic;
        u16 version_major;
        void __iomem *shared_area;
 
        }
 
        if (IS_TIGERLAKE(i915)) {
-               struct pci_dev *root, *pdev = i915->drm.pdev;
+               struct pci_dev *root, *pdev = to_pci_dev(i915->drm.dev);
 
                root = list_first_entry(&pdev->bus->devices, typeof(*root), bus_list);
 
 
 {
        struct drm_i915_private *i915 =
                        container_of(rpm, struct drm_i915_private, runtime_pm);
-       struct pci_dev *pdev = i915->drm.pdev;
+       struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
        struct device *kdev = &pdev->dev;
 
        rpm->kdev = kdev;
 
 static int uncore_mmio_setup(struct intel_uncore *uncore)
 {
        struct drm_i915_private *i915 = uncore->i915;
-       struct pci_dev *pdev = i915->drm.pdev;
+       struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
        int mmio_bar;
        int mmio_size;
 
 
 static void uncore_mmio_cleanup(struct intel_uncore *uncore)
 {
-       struct pci_dev *pdev = uncore->i915->drm.pdev;
+       struct pci_dev *pdev = to_pci_dev(uncore->i915->drm.dev);
 
        pci_iounmap(pdev, uncore->regs);
 }
 
        ppgtt->vm.i915 = i915;
        ppgtt->vm.total = round_down(U64_MAX, PAGE_SIZE);
        ppgtt->vm.file = ERR_PTR(-ENODEV);
-       ppgtt->vm.dma = &i915->drm.pdev->dev;
+       ppgtt->vm.dma = i915->drm.dev;
 
        i915_address_space_init(&ppgtt->vm, VM_CLASS_PPGTT);