ARM: DRA7: hwmod: Add reset data for PCIe

Add PCIe reset data to PCIe hwmods on DRA7x.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>

diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 84c2699e551b5b6648030cffa609a715c97ba45b..b61355e2a7717a219f080aec978d17565d7e1477 100644 (file)
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -1531,29 +1531,44 @@ static struct omap_hwmod_class dra7xx_pciess_hwmod_class = {
 };
 
 /* pcie1 */
+static struct omap_hwmod_rst_info dra7xx_pciess1_resets[] = {
+       { .name = "pcie", .rst_shift = 0 },
+};
+
 static struct omap_hwmod dra7xx_pciess1_hwmod = {
        .name           = "pcie1",
        .class          = &dra7xx_pciess_hwmod_class,
        .clkdm_name     = "pcie_clkdm",
+       .rst_lines      = dra7xx_pciess1_resets,
+       .rst_lines_cnt  = ARRAY_SIZE(dra7xx_pciess1_resets),
        .main_clk       = "l4_root_clk_div",
        .prcm = {
                .omap4 = {
                        .clkctrl_offs = DRA7XX_CM_L3INIT_PCIESS1_CLKCTRL_OFFSET,
+                       .rstctrl_offs = DRA7XX_RM_L3INIT_PCIESS_RSTCTRL_OFFSET,
                        .context_offs = DRA7XX_RM_L3INIT_PCIESS1_CONTEXT_OFFSET,
                        .modulemode   = MODULEMODE_SWCTRL,
                },
        },
 };
 
+/* pcie2 */
+static struct omap_hwmod_rst_info dra7xx_pciess2_resets[] = {
+       { .name = "pcie", .rst_shift = 1 },
+};
+
 /* pcie2 */
 static struct omap_hwmod dra7xx_pciess2_hwmod = {
        .name           = "pcie2",
        .class          = &dra7xx_pciess_hwmod_class,
        .clkdm_name     = "pcie_clkdm",
+       .rst_lines      = dra7xx_pciess2_resets,
+       .rst_lines_cnt  = ARRAY_SIZE(dra7xx_pciess2_resets),
        .main_clk       = "l4_root_clk_div",
        .prcm = {
                .omap4 = {
                        .clkctrl_offs = DRA7XX_CM_L3INIT_PCIESS2_CLKCTRL_OFFSET,
+                       .rstctrl_offs = DRA7XX_RM_L3INIT_PCIESS_RSTCTRL_OFFSET,
                        .context_offs = DRA7XX_RM_L3INIT_PCIESS2_CONTEXT_OFFSET,
                        .modulemode   = MODULEMODE_SWCTRL,
                },

diff --git a/arch/arm/mach-omap2/prm7xx.h b/arch/arm/mach-omap2/prm7xx.h
index cc1e6a2b97f66af3b9ea53f0a1a57115aaac77a4..294deed956f36fb90e12d47b552455084dafe90a 100644 (file)
--- a/arch/arm/mach-omap2/prm7xx.h
+++ b/arch/arm/mach-omap2/prm7xx.h
@@ -360,6 +360,7 @@
 /* PRM.L3INIT_PRM register offsets */
 #define DRA7XX_PM_L3INIT_PWRSTCTRL_OFFSET                      0x0000
 #define DRA7XX_PM_L3INIT_PWRSTST_OFFSET                                0x0004
+#define DRA7XX_RM_L3INIT_PCIESS_RSTCTRL_OFFSET                 0x0010
 #define DRA7XX_PM_L3INIT_MMC1_WKDEP_OFFSET                     0x0028
 #define DRA7XX_RM_L3INIT_MMC1_CONTEXT_OFFSET                   0x002c
 #define DRA7XX_PM_L3INIT_MMC2_WKDEP_OFFSET                     0x0030