mtd: rawnand: fscm: Avoid collision on PC def when compiling for MIPS

We want to allow this driver to be selected when COMPILE_TEST=y, this
means the driver can be compiled for any arch, including MIPS. When
compiling this driver for MIPS, we end up with a collision on the 'PC'
macro definition (also defined in arch/mips/include/asm/ptrace.h).

Prefix the fsmc one with FSMC_ to avoid this problem.

Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>

diff --git a/drivers/mtd/nand/raw/fsmc_nand.c b/drivers/mtd/nand/raw/fsmc_nand.c
index f4a5a317d4ae41abced010018817ac2be16b8ed4..d71c49f50e77bb69b0abe7d8bbc75e33934db825 100644 (file)
--- a/drivers/mtd/nand/raw/fsmc_nand.c
+++ b/drivers/mtd/nand/raw/fsmc_nand.c
@@ -62,7 +62,7 @@
                                                reg)
 
 /* fsmc controller registers for NAND flash */
-#define PC                     0x00
+#define FSMC_PC                        0x00
        /* pc register definitions */
        #define FSMC_RESET              (1 << 0)
        #define FSMC_WAITON             (1 << 1)
@@ -273,12 +273,13 @@ static void fsmc_nand_setup(struct fsmc_nand_data *host,
        tset = (tims->tset & FSMC_TSET_MASK) << FSMC_TSET_SHIFT;
 
        if (host->nand.options & NAND_BUSWIDTH_16)
-               writel_relaxed(value | FSMC_DEVWID_16, host->regs_va + PC);
+               writel_relaxed(value | FSMC_DEVWID_16,
+                              host->regs_va + FSMC_PC);
        else
-               writel_relaxed(value | FSMC_DEVWID_8, host->regs_va + PC);
+               writel_relaxed(value | FSMC_DEVWID_8, host->regs_va + FSMC_PC);
 
-       writel_relaxed(readl(host->regs_va + PC) | tclr | tar,
-                      host->regs_va + PC);
+       writel_relaxed(readl(host->regs_va + FSMC_PC) | tclr | tar,
+                      host->regs_va + FSMC_PC);
        writel_relaxed(thiz | thold | twait | tset, host->regs_va + COMM);
        writel_relaxed(thiz | thold | twait | tset, host->regs_va + ATTRIB);
 }
@@ -371,12 +372,12 @@ static void fsmc_enable_hwecc(struct mtd_info *mtd, int mode)
 {
        struct fsmc_nand_data *host = mtd_to_fsmc(mtd);
 
-       writel_relaxed(readl(host->regs_va + PC) & ~FSMC_ECCPLEN_256,
-                      host->regs_va + PC);
-       writel_relaxed(readl(host->regs_va + PC) & ~FSMC_ECCEN,
-                      host->regs_va + PC);
-       writel_relaxed(readl(host->regs_va + PC) | FSMC_ECCEN,
-                      host->regs_va + PC);
+       writel_relaxed(readl(host->regs_va + FSMC_PC) & ~FSMC_ECCPLEN_256,
+                      host->regs_va + FSMC_PC);
+       writel_relaxed(readl(host->regs_va + FSMC_PC) & ~FSMC_ECCEN,
+                      host->regs_va + FSMC_PC);
+       writel_relaxed(readl(host->regs_va + FSMC_PC) | FSMC_ECCEN,
+                      host->regs_va + FSMC_PC);
 }
 
 /*
@@ -618,11 +619,11 @@ static void fsmc_select_chip(struct mtd_info *mtd, int chipnr)
        if (chipnr > 0)
                return;
 
-       pc = readl(host->regs_va + PC);
+       pc = readl(host->regs_va + FSMC_PC);
        if (chipnr < 0)
-               writel_relaxed(pc & ~FSMC_ENABLE, host->regs_va + PC);
+               writel_relaxed(pc & ~FSMC_ENABLE, host->regs_va + FSMC_PC);
        else
-               writel_relaxed(pc | FSMC_ENABLE, host->regs_va + PC);
+               writel_relaxed(pc | FSMC_ENABLE, host->regs_va + FSMC_PC);
 
        /* nCE line must be asserted before starting any operation */
        mb();