drm/i915: Pass computed vco to bxt_set_cdclk()

Rather than compute the vco inside bxt_set_cdclk() let's precompute it
outside and pass it in. A small step towards a fully precomputed cdclk
state.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170120182205.8141-7-ville.syrjala@linux.intel.com

diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c
index 04a46c14c898f30f48309e230339165d0c8f2d12..a0736b5f2d47d188c528785e7ef4c45685fbd946 100644 (file)
--- a/drivers/gpu/drm/i915/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/intel_cdclk.c
@@ -1143,15 +1143,11 @@ static void bxt_de_pll_enable(struct drm_i915_private *dev_priv, int vco)
        dev_priv->cdclk_pll.vco = vco;
 }
 
-static void bxt_set_cdclk(struct drm_i915_private *dev_priv, int cdclk)
+static void bxt_set_cdclk(struct drm_i915_private *dev_priv,
+                         int cdclk, int vco)
 {
        u32 val, divider;
-       int vco, ret;
-
-       if (IS_GEMINILAKE(dev_priv))
-               vco = glk_de_pll_vco(dev_priv, cdclk);
-       else
-               vco = bxt_de_pll_vco(dev_priv, cdclk);
+       int ret;
 
        DRM_DEBUG_DRIVER("Changing CDCLK to %d kHz (VCO %d kHz)\n",
                         cdclk, vco);
@@ -1284,7 +1280,7 @@ sanitize:
  */
 void bxt_init_cdclk(struct drm_i915_private *dev_priv)
 {
-       int cdclk;
+       int cdclk, vco;
 
        bxt_sanitize_cdclk(dev_priv);
 
@@ -1296,12 +1292,15 @@ void bxt_init_cdclk(struct drm_i915_private *dev_priv)
         * - The initial CDCLK needs to be read from VBT.
         *   Need to make this change after VBT has changes for BXT.
         */
-       if (IS_GEMINILAKE(dev_priv))
+       if (IS_GEMINILAKE(dev_priv)) {
                cdclk = glk_calc_cdclk(0);
-       else
+               vco = glk_de_pll_vco(dev_priv, cdclk);
+       } else {
                cdclk = bxt_calc_cdclk(0);
+               vco = bxt_de_pll_vco(dev_priv, cdclk);
+       }
 
-       bxt_set_cdclk(dev_priv, cdclk);
+       bxt_set_cdclk(dev_priv, cdclk, vco);
 }
 
 /**
@@ -1313,7 +1312,7 @@ void bxt_init_cdclk(struct drm_i915_private *dev_priv)
  */
 void bxt_uninit_cdclk(struct drm_i915_private *dev_priv)
 {
-       bxt_set_cdclk(dev_priv, dev_priv->cdclk_pll.ref);
+       bxt_set_cdclk(dev_priv, dev_priv->cdclk_pll.ref, 0);
 }
 
 static int bdw_adjust_min_pipe_pixel_rate(struct intel_crtc_state *crtc_state,
@@ -1533,12 +1532,18 @@ static int bxt_modeset_calc_cdclk(struct drm_atomic_state *state)
 
 static void bxt_modeset_commit_cdclk(struct drm_atomic_state *old_state)
 {
-       struct drm_device *dev = old_state->dev;
+       struct drm_i915_private *dev_priv = to_i915(old_state->dev);
        struct intel_atomic_state *old_intel_state =
                to_intel_atomic_state(old_state);
        unsigned int req_cdclk = old_intel_state->dev_cdclk;
+       unsigned int req_vco;
+
+       if (IS_GEMINILAKE(dev_priv))
+               req_vco = glk_de_pll_vco(dev_priv, req_cdclk);
+       else
+               req_vco = bxt_de_pll_vco(dev_priv, req_cdclk);
 
-       bxt_set_cdclk(to_i915(dev), req_cdclk);
+       bxt_set_cdclk(dev_priv, req_cdclk, req_vco);
 }
 
 static int intel_compute_max_dotclk(struct drm_i915_private *dev_priv)