mmc: sdhci_am654: Update OTAPDLY writes

According to the latest AM65x Data Manual[1], a different output tap
delay value is optimum for a given speed mode. Therefore, deprecate the
ti,otap-del-sel binding and introduce a new binding for each of the
possible MMC/SD speed modes. If the legacy mode is not found, fall back
to old binding to maintain dts compatibility.

[1] http://www.ti.com/lit/gpn/am6526

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20200108150920.14547-3-faiz_abbas@ti.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>

diff --git a/drivers/mmc/host/sdhci_am654.c b/drivers/mmc/host/sdhci_am654.c
index 3afea580fbea3fb6c7fe8298dc3cb7bed76457bb..f8a6aa98a7953159fbbbaa1489f50e2ece729f48 100644 (file)
--- a/drivers/mmc/host/sdhci_am654.c
+++ b/drivers/mmc/host/sdhci_am654.c
@@ -81,7 +81,8 @@ static struct regmap_config sdhci_am654_regmap_config = {
 
 struct sdhci_am654_data {
        struct regmap *base;
-       int otap_del_sel;
+       bool legacy_otapdly;
+       int otap_del_sel[11];
        int trm_icp;
        int drv_strength;
        bool dll_on;
@@ -98,11 +99,34 @@ struct sdhci_am654_driver_data {
 #define DLL_PRESENT    (1 << 3)
 };
 
+struct timing_data {
+       const char *binding;
+       u32 capability;
+};
+
+static const struct timing_data td[] = {
+       [MMC_TIMING_LEGACY] = {"ti,otap-del-sel-legacy", 0},
+       [MMC_TIMING_MMC_HS] = {"ti,otap-del-sel-mmc-hs", MMC_CAP_MMC_HIGHSPEED},
+       [MMC_TIMING_SD_HS]  = {"ti,otap-del-sel-sd-hs", MMC_CAP_SD_HIGHSPEED},
+       [MMC_TIMING_UHS_SDR12] = {"ti,otap-del-sel-sdr12", MMC_CAP_UHS_SDR12},
+       [MMC_TIMING_UHS_SDR25] = {"ti,otap-del-sel-sdr25", MMC_CAP_UHS_SDR25},
+       [MMC_TIMING_UHS_SDR50] = {"ti,otap-del-sel-sdr50", MMC_CAP_UHS_SDR50},
+       [MMC_TIMING_UHS_SDR104] = {"ti,otap-del-sel-sdr104",
+                                  MMC_CAP_UHS_SDR104},
+       [MMC_TIMING_UHS_DDR50] = {"ti,otap-del-sel-ddr50", MMC_CAP_UHS_DDR50},
+       [MMC_TIMING_MMC_DDR52] = {"ti,otap-del-sel-ddr52", MMC_CAP_DDR},
+       [MMC_TIMING_MMC_HS200] = {"ti,otap-del-sel-hs200", MMC_CAP2_HS200},
+       [MMC_TIMING_MMC_HS400] = {"ti,otap-del-sel-hs400", MMC_CAP2_HS400},
+};
+
 static void sdhci_am654_set_clock(struct sdhci_host *host, unsigned int clock)
 {
        struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
        struct sdhci_am654_data *sdhci_am654 = sdhci_pltfm_priv(pltfm_host);
+       unsigned char timing = host->mmc->ios.timing;
        int sel50, sel100, freqsel;
+       u32 otap_del_sel;
+       u32 otap_del_ena;
        u32 mask, val;
        int ret;
 
@@ -116,22 +140,29 @@ static void sdhci_am654_set_clock(struct sdhci_host *host, unsigned int clock)
 
        if (clock > CLOCK_TOO_SLOW_HZ) {
                /* Setup DLL Output TAP delay */
+               if (sdhci_am654->legacy_otapdly)
+                       otap_del_sel = sdhci_am654->otap_del_sel[0];
+               else
+                       otap_del_sel = sdhci_am654->otap_del_sel[timing];
+
+               otap_del_ena = (timing > MMC_TIMING_UHS_SDR25) ? 1 : 0;
+
                mask = OTAPDLYENA_MASK | OTAPDLYSEL_MASK;
-               val = (1 << OTAPDLYENA_SHIFT) |
-                     (sdhci_am654->otap_del_sel << OTAPDLYSEL_SHIFT);
-               regmap_update_bits(sdhci_am654->base, PHY_CTRL4, mask, val);
+               val = (otap_del_ena << OTAPDLYENA_SHIFT) |
+                     (otap_del_sel << OTAPDLYSEL_SHIFT);
+
                /* Write to STRBSEL for HS400 speed mode */
-               if (host->mmc->ios.timing == MMC_TIMING_MMC_HS400) {
+               if (timing == MMC_TIMING_MMC_HS400) {
                        if (sdhci_am654->flags & STRBSEL_4_BIT)
-                               mask = STRBSEL_4BIT_MASK;
+                               mask |= STRBSEL_4BIT_MASK;
                        else
-                               mask = STRBSEL_8BIT_MASK;
+                               mask |= STRBSEL_8BIT_MASK;
 
-                       regmap_update_bits(sdhci_am654->base, PHY_CTRL4, mask,
-                                          sdhci_am654->strb_sel <<
-                                          STRBSEL_SHIFT);
+                       val |= sdhci_am654->strb_sel << STRBSEL_SHIFT;
                }
 
+               regmap_update_bits(sdhci_am654->base, PHY_CTRL4, mask, val);
+
                if (sdhci_am654->flags & FREQSEL_2_BIT) {
                        switch (clock) {
                        case 200000000:
@@ -198,11 +229,19 @@ static void sdhci_j721e_4bit_set_clock(struct sdhci_host *host,
 {
        struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
        struct sdhci_am654_data *sdhci_am654 = sdhci_pltfm_priv(pltfm_host);
-       int val, mask;
+       unsigned char timing = host->mmc->ios.timing;
+       u32 otap_del_sel;
+       u32 mask, val;
+
+       /* Setup DLL Output TAP delay */
+       if (sdhci_am654->legacy_otapdly)
+               otap_del_sel = sdhci_am654->otap_del_sel[0];
+       else
+               otap_del_sel = sdhci_am654->otap_del_sel[timing];
 
        mask = OTAPDLYENA_MASK | OTAPDLYSEL_MASK;
-       val = (1 << OTAPDLYENA_SHIFT) |
-             (sdhci_am654->otap_del_sel << OTAPDLYSEL_SHIFT);
+       val = (0x1 << OTAPDLYENA_SHIFT) |
+             (otap_del_sel << OTAPDLYSEL_SHIFT);
        regmap_update_bits(sdhci_am654->base, PHY_CTRL4, mask, val);
 
        sdhci_set_clock(host, clock);
@@ -371,6 +410,55 @@ static int sdhci_am654_cqe_add_host(struct sdhci_host *host)
        return ret;
 }
 
+static int sdhci_am654_get_otap_delay(struct sdhci_host *host,
+                                     struct sdhci_am654_data *sdhci_am654)
+{
+       struct device *dev = mmc_dev(host->mmc);
+       int i;
+       int ret;
+
+       ret = device_property_read_u32(dev, td[MMC_TIMING_LEGACY].binding,
+                                &sdhci_am654->otap_del_sel[MMC_TIMING_LEGACY]);
+       if (ret) {
+               /*
+                * ti,otap-del-sel-legacy is mandatory, look for old binding
+                * if not found.
+                */
+               ret = device_property_read_u32(dev, "ti,otap-del-sel",
+                                              &sdhci_am654->otap_del_sel[0]);
+               if (ret) {
+                       dev_err(dev, "Couldn't find otap-del-sel\n");
+
+                       return ret;
+               }
+
+               dev_info(dev, "Using legacy binding ti,otap-del-sel\n");
+               sdhci_am654->legacy_otapdly = true;
+
+               return 0;
+       }
+
+       for (i = MMC_TIMING_MMC_HS; i <= MMC_TIMING_MMC_HS400; i++) {
+
+               ret = device_property_read_u32(dev, td[i].binding,
+                                              &sdhci_am654->otap_del_sel[i]);
+               if (ret) {
+                       dev_dbg(dev, "Couldn't find %s\n",
+                               td[i].binding);
+                       /*
+                        * Remove the corresponding capability
+                        * if an otap-del-sel value is not found
+                        */
+                       if (i <= MMC_TIMING_MMC_DDR52)
+                               host->mmc->caps &= ~td[i].capability;
+                       else
+                               host->mmc->caps2 &= ~td[i].capability;
+               }
+       }
+
+       return 0;
+}
+
 static int sdhci_am654_init(struct sdhci_host *host)
 {
        struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
@@ -419,6 +507,10 @@ static int sdhci_am654_init(struct sdhci_host *host)
        if (ret)
                goto err_cleanup_host;
 
+       ret = sdhci_am654_get_otap_delay(host, sdhci_am654);
+       if (ret)
+               goto err_cleanup_host;
+
        ret = __sdhci_add_host(host);
        if (ret)
                goto err_cleanup_host;
@@ -437,11 +529,6 @@ static int sdhci_am654_get_of_property(struct platform_device *pdev,
        int drv_strength;
        int ret;
 
-       ret = device_property_read_u32(dev, "ti,otap-del-sel",
-                                      &sdhci_am654->otap_del_sel);
-       if (ret)
-               return ret;
-
        if (sdhci_am654->flags & DLL_PRESENT) {
                ret = device_property_read_u32(dev, "ti,trm-icp",
                                               &sdhci_am654->trm_icp);

diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h
index 94e3c87c1a586ac7598df17f21256a682fcef878..f5db24a6a860801fba6c255aaaa6a11d6e261b08 100644 (file)
--- a/include/linux/mmc/host.h
+++ b/include/linux/mmc/host.h
@@ -322,6 +322,8 @@ struct mmc_host {
 #define MMC_CAP_3_3V_DDR       (1 << 11)       /* Host supports eMMC DDR 3.3V */
 #define MMC_CAP_1_8V_DDR       (1 << 12)       /* Host supports eMMC DDR 1.8V */
 #define MMC_CAP_1_2V_DDR       (1 << 13)       /* Host supports eMMC DDR 1.2V */
+#define MMC_CAP_DDR            (MMC_CAP_3_3V_DDR | MMC_CAP_1_8V_DDR | \
+                                MMC_CAP_1_2V_DDR)
 #define MMC_CAP_POWER_OFF_CARD (1 << 14)       /* Can power off after boot */
 #define MMC_CAP_BUS_WIDTH_TEST (1 << 15)       /* CMD14/CMD19 bus width ok */
 #define MMC_CAP_UHS_SDR12      (1 << 16)       /* Host supports UHS SDR12 mode */