drm/i915: pass dev_priv explicitly to PIPE_FRMCOUNT_G4X

Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the PIPE_FRMCOUNT_G4X register macro.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/747124e5eebdb58b06d70a0aae0af4dd7e6b7d86.1717514638.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
index f2eb3bc65203d622ec6700441d852590b0851e79..e5db54b1c6320d5ba96dc71edf8d3481ddc5d2cf 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_vblank.c
+++ b/drivers/gpu/drm/i915/display/intel_vblank.c
@@ -126,7 +126,7 @@ u32 g4x_get_vblank_counter(struct drm_crtc *crtc)
        if (!vblank->max_vblank_count)
                return 0;
 
-       return intel_de_read(dev_priv, PIPE_FRMCOUNT_G4X(pipe));
+       return intel_de_read(dev_priv, PIPE_FRMCOUNT_G4X(dev_priv, pipe));
 }
 
 static u32 intel_crtc_scanlines_since_frame_timestamp(struct intel_crtc *crtc)

diff --git a/drivers/gpu/drm/i915/gvt/display.c b/drivers/gpu/drm/i915/gvt/display.c
index ad21b8f65d6b88e795a5ca71caeeb5fd9a55800d..3681dca165c692e8ddb913e6bcfd4bd2c62fdaed 100644 (file)
--- a/drivers/gpu/drm/i915/gvt/display.c
+++ b/drivers/gpu/drm/i915/gvt/display.c
@@ -647,7 +647,7 @@ static void emulate_vblank_on_pipe(struct intel_vgpu *vgpu, int pipe)
        }
 
        if (pipe_is_enabled(vgpu, pipe)) {
-               vgpu_vreg_t(vgpu, PIPE_FRMCOUNT_G4X(pipe))++;
+               vgpu_vreg_t(vgpu, PIPE_FRMCOUNT_G4X(dev_priv, pipe))++;
                intel_vgpu_trigger_virtual_event(vgpu, vblank_event[pipe]);
        }
 }

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 3a75fa5c8b5bad82ca8fd852bcfbd377db7f57bf..0ab8df446ea96fe890e7d176063bcbd6d0b2aaf7 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -2176,7 +2176,7 @@
 /* GM45+ just has to be different */
 #define _PIPEA_FRMCOUNT_G4X    0x70040
 #define _PIPEA_FLIPCOUNT_G4X   0x70044
-#define PIPE_FRMCOUNT_G4X(pipe) _MMIO_PIPE2(dev_priv, pipe, _PIPEA_FRMCOUNT_G4X)
+#define PIPE_FRMCOUNT_G4X(dev_priv, pipe) _MMIO_PIPE2(dev_priv, pipe, _PIPEA_FRMCOUNT_G4X)
 #define PIPE_FLIPCOUNT_G4X(pipe) _MMIO_PIPE2(dev_priv, pipe, _PIPEA_FLIPCOUNT_G4X)
 
 /* CHV pipe B blender */

diff --git a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c
index 00ee588fab39d1370ea17c7da5b0bb6e0e2a607e..2e027f3ee750e20b2cb38935e39a845d0ba2f598 100644 (file)
--- a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c
+++ b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c
@@ -142,10 +142,10 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter)
        MMIO_D(PIPE_FLIPCOUNT_G4X(PIPE_B));
        MMIO_D(PIPE_FLIPCOUNT_G4X(PIPE_C));
        MMIO_D(PIPE_FLIPCOUNT_G4X(_PIPE_EDP));
-       MMIO_D(PIPE_FRMCOUNT_G4X(PIPE_A));
-       MMIO_D(PIPE_FRMCOUNT_G4X(PIPE_B));
-       MMIO_D(PIPE_FRMCOUNT_G4X(PIPE_C));
-       MMIO_D(PIPE_FRMCOUNT_G4X(_PIPE_EDP));
+       MMIO_D(PIPE_FRMCOUNT_G4X(dev_priv, PIPE_A));
+       MMIO_D(PIPE_FRMCOUNT_G4X(dev_priv, PIPE_B));
+       MMIO_D(PIPE_FRMCOUNT_G4X(dev_priv, PIPE_C));
+       MMIO_D(PIPE_FRMCOUNT_G4X(dev_priv, _PIPE_EDP));
        MMIO_D(CURCNTR(dev_priv, PIPE_A));
        MMIO_D(CURCNTR(dev_priv, PIPE_B));
        MMIO_D(CURCNTR(dev_priv, PIPE_C));