};
 
 
-int amdgpu_align_pitch(struct amdgpu_device *adev, int width, int bpp, bool tiled)
+int amdgpu_align_pitch(struct amdgpu_device *adev, int width, int cpp, bool tiled)
 {
        int aligned = width;
        int pitch_mask = 0;
 
-       switch (bpp / 8) {
+       switch (cpp) {
        case 1:
                pitch_mask = 255;
                break;
 
        aligned += pitch_mask;
        aligned &= ~pitch_mask;
-       return aligned;
+       return aligned * cpp;
 }
 
 static void amdgpufb_destroy_pinned_object(struct drm_gem_object *gobj)
        int ret;
        int aligned_size, size;
        int height = mode_cmd->height;
-       u32 bpp, depth;
+       u32 cpp;
 
-       drm_fb_get_bpp_depth(mode_cmd->pixel_format, &depth, &bpp);
+       cpp = drm_format_plane_cpp(mode_cmd->pixel_format, 0);
 
        /* need to align pitch with crtc limits */
-       mode_cmd->pitches[0] = amdgpu_align_pitch(adev, mode_cmd->width, bpp,
-                                                 fb_tiled) * ((bpp + 1) / 8);
+       mode_cmd->pitches[0] = amdgpu_align_pitch(adev, mode_cmd->width, cpp,
+                                                 fb_tiled);
 
        height = ALIGN(mode_cmd->height, 8);
        size = mode_cmd->pitches[0] * height;
 
        uint32_t handle;
        int r;
 
-       args->pitch = amdgpu_align_pitch(adev, args->width, args->bpp, 0) * ((args->bpp + 1) / 8);
+       args->pitch = amdgpu_align_pitch(adev, args->width,
+                                        DIV_ROUND_UP(args->bpp, 8), 0);
        args->size = (u64)args->pitch * args->height;
        args->size = ALIGN(args->size, PAGE_SIZE);