FIELD_PREP(AT803X_SFC_MDI_CROSSOVER_MODE_M, val));
 }
 
-static int at803x_config_aneg(struct phy_device *phydev)
+static int at803x_prepare_config_aneg(struct phy_device *phydev)
 {
-       struct at803x_priv *priv = phydev->priv;
        int ret;
 
        ret = at803x_config_mdix(phydev, phydev->mdix_ctrl);
                        return ret;
        }
 
-       if (priv->is_1000basex)
-               return genphy_c37_config_aneg(phydev);
-
-       /* Do not restart auto-negotiation by setting ret to 0 defautly,
-        * when calling __genphy_config_aneg later.
-        */
-       ret = 0;
-
-       if (phydev->drv->phy_id == QCA8081_PHY_ID) {
-               int phy_ctrl = 0;
+       return 0;
+}
 
-               /* The reg MII_BMCR also needs to be configured for force mode, the
-                * genphy_config_aneg is also needed.
-                */
-               if (phydev->autoneg == AUTONEG_DISABLE)
-                       genphy_c45_pma_setup_forced(phydev);
+static int at803x_config_aneg(struct phy_device *phydev)
+{
+       struct at803x_priv *priv = phydev->priv;
+       int ret;
 
-               if (linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, phydev->advertising))
-                       phy_ctrl = MDIO_AN_10GBT_CTRL_ADV2_5G;
+       ret = at803x_prepare_config_aneg(phydev);
+       if (ret)
+               return ret;
 
-               ret = phy_modify_mmd_changed(phydev, MDIO_MMD_AN, MDIO_AN_10GBT_CTRL,
-                               MDIO_AN_10GBT_CTRL_ADV2_5G, phy_ctrl);
-               if (ret < 0)
-                       return ret;
-       }
+       if (priv->is_1000basex)
+               return genphy_c37_config_aneg(phydev);
 
-       return __genphy_config_aneg(phydev, ret);
+       return genphy_config_aneg(phydev);
 }
 
 static int at803x_get_downshift(struct phy_device *phydev, u8 *d)
        return 0;
 }
 
+static int qca808x_config_aneg(struct phy_device *phydev)
+{
+       int phy_ctrl = 0;
+       int ret;
+
+       ret = at803x_prepare_config_aneg(phydev);
+       if (ret)
+               return ret;
+
+       /* The reg MII_BMCR also needs to be configured for force mode, the
+        * genphy_config_aneg is also needed.
+        */
+       if (phydev->autoneg == AUTONEG_DISABLE)
+               genphy_c45_pma_setup_forced(phydev);
+
+       if (linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, phydev->advertising))
+               phy_ctrl = MDIO_AN_10GBT_CTRL_ADV2_5G;
+
+       ret = phy_modify_mmd_changed(phydev, MDIO_MMD_AN, MDIO_AN_10GBT_CTRL,
+                                    MDIO_AN_10GBT_CTRL_ADV2_5G, phy_ctrl);
+       if (ret < 0)
+               return ret;
+
+       return __genphy_config_aneg(phydev, ret);
+}
+
 static void qca808x_link_change_notify(struct phy_device *phydev)
 {
        /* Assert interface sgmii fifo on link down, deassert it on link up,
        .set_wol                = at803x_set_wol,
        .get_wol                = at803x_get_wol,
        .get_features           = qca808x_get_features,
-       .config_aneg            = at803x_config_aneg,
+       .config_aneg            = qca808x_config_aneg,
        .suspend                = genphy_suspend,
        .resume                 = genphy_resume,
        .read_status            = qca808x_read_status,