Now that CONFIG_PPC_CELL_NATIVE is removed, iommu_fixed_is_weak will
always be false, so remove it entirely.
Also remove a hack/quirk in the HTAB code that was only used on Cell.
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com>
Link: https://patch.msgid.link/20241218105523.416573-2-mpe@ellerman.id.au
 extern enum dma_data_direction iommu_tce_direction(unsigned long tce);
 extern unsigned long iommu_direction_to_tce_perm(enum dma_data_direction dir);
 
-#ifdef CONFIG_PPC_CELL_NATIVE
-extern bool iommu_fixed_is_weak;
-#else
-#define iommu_fixed_is_weak false
-#endif
-
 extern const struct dma_map_ops dma_iommu_ops;
 
 #endif /* __KERNEL__ */
 
        struct pci_dev *pdev = to_pci_dev(dev);
        struct pci_controller *phb = pci_bus_to_host(pdev->bus);
 
-       if (iommu_fixed_is_weak || !phb->controller_ops.iommu_bypass_supported)
+       if (!phb->controller_ops.iommu_bypass_supported)
                return false;
        return phb->controller_ops.iommu_bypass_supported(pdev, mask);
 }
 
        } else {
                unsigned long limit = MEMBLOCK_ALLOC_ANYWHERE;
 
-#ifdef CONFIG_PPC_CELL
-               /*
-                * Cell may require the hash table down low when using the
-                * Axon IOMMU in order to fit the dynamic region over it, see
-                * comments in cell/iommu.c
-                */
-               if (fdt_subnode_offset(initial_boot_params, 0, "axon") > 0) {
-                       limit = 0x80000000;
-                       pr_info("Hash table forced below 2G for Axon IOMMU\n");
-               }
-#endif /* CONFIG_PPC_CELL */
-
                table = memblock_phys_alloc_range(htab_size_bytes,
                                                  htab_size_bytes,
                                                  0, limit);