const struct drm_connector_state *conn_state)
 {
        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
-       struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
-       enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
 
        if (DISPLAY_VER(dev_priv) >= 12)
                tgl_ddi_pre_enable_dp(state, encoder, crtc_state, conn_state);
        /* MST will call a setting of MSA after an allocating of Virtual Channel
         * from MST encoder pre_enable callback.
         */
-       if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST)) {
+       if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST))
                intel_ddi_set_dp_msa(crtc_state, conn_state);
-
-               intel_cpu_transcoder_set_m1_n1(crtc, cpu_transcoder,
-                                              &crtc_state->dp_m_n);
-               intel_cpu_transcoder_set_m2_n2(crtc, cpu_transcoder,
-                                              &crtc_state->dp_m2_n2);
-       }
 }
 
 static void intel_ddi_pre_enable_hdmi(struct intel_atomic_state *state,
 
        struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
        enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
 
+       if (crtc_state->has_pch_encoder) {
+               intel_cpu_transcoder_set_m1_n1(crtc, cpu_transcoder,
+                                              &crtc_state->fdi_m_n);
+       } else if (intel_crtc_has_dp_encoder(crtc_state)) {
+               intel_cpu_transcoder_set_m1_n1(crtc, cpu_transcoder,
+                                              &crtc_state->dp_m_n);
+               intel_cpu_transcoder_set_m2_n2(crtc, cpu_transcoder,
+                                              &crtc_state->dp_m2_n2);
+       }
+
        intel_set_transcoder_timings(crtc_state);
 
        if (cpu_transcoder != TRANSCODER_EDP)
                intel_de_write(dev_priv, PIPE_MULT(cpu_transcoder),
                               crtc_state->pixel_multiplier - 1);
 
-       if (crtc_state->has_pch_encoder)
-               intel_cpu_transcoder_set_m1_n1(crtc, cpu_transcoder,
-                                              &crtc_state->fdi_m_n);
-
        hsw_set_frame_start_delay(crtc_state);
 
        hsw_set_transconf(crtc_state);
 
        struct intel_digital_port *dig_port = intel_mst->primary;
        struct intel_dp *intel_dp = &dig_port->dp;
        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
-       struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
        struct intel_connector *connector =
                to_intel_connector(conn_state->connector);
        int ret;
                intel_ddi_enable_pipe_clock(encoder, pipe_config);
 
        intel_ddi_set_dp_msa(pipe_config, conn_state);
-
-       intel_cpu_transcoder_set_m1_n1(crtc, pipe_config->cpu_transcoder,
-                                      &pipe_config->dp_m_n);
 }
 
 static void intel_mst_enable_dp(struct intel_atomic_state *state,