crypto: hisilicon/qm - dump important registers values before resetting

Read the values of some device registers before the device
is reset, these values help analyze the cause of the device exception.

Signed-off-by: Weili Qian <qianweili@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

diff --git a/drivers/crypto/hisilicon/debugfs.c b/drivers/crypto/hisilicon/debugfs.c
index 615c8e18d8b0e0d355f543aa95dac85c59297ac5..06e67eda409f8fdd4133913b14be0f8101c67143 100644 (file)
--- a/drivers/crypto/hisilicon/debugfs.c
+++ b/drivers/crypto/hisilicon/debugfs.c
@@ -83,6 +83,30 @@ static const struct debugfs_reg32 qm_dfx_regs[] = {
        {"QM_DFX_FF_ST5                 ",  0x1040dc},
        {"QM_DFX_FF_ST6                 ",  0x1040e0},
        {"QM_IN_IDLE_ST                 ",  0x1040e4},
+       {"QM_CACHE_CTL                  ",  0x100050},
+       {"QM_TIMEOUT_CFG                ",  0x100070},
+       {"QM_DB_TIMEOUT_CFG             ",  0x100074},
+       {"QM_FLR_PENDING_TIME_CFG       ",  0x100078},
+       {"QM_ARUSR_MCFG1                ",  0x100088},
+       {"QM_AWUSR_MCFG1                ",  0x100098},
+       {"QM_AXI_M_CFG_ENABLE           ",  0x1000B0},
+       {"QM_RAS_CE_THRESHOLD           ",  0x1000F8},
+       {"QM_AXI_TIMEOUT_CTRL           ",  0x100120},
+       {"QM_AXI_TIMEOUT_STATUS         ",  0x100124},
+       {"QM_CQE_AGGR_TIMEOUT_CTRL      ",  0x100144},
+       {"ACC_RAS_MSI_INT_SEL           ",  0x1040fc},
+       {"QM_CQE_OUT                    ",  0x104100},
+       {"QM_EQE_OUT                    ",  0x104104},
+       {"QM_AEQE_OUT                   ",  0x104108},
+       {"QM_DB_INFO0                   ",  0x104180},
+       {"QM_DB_INFO1                   ",  0x104184},
+       {"QM_AM_CTRL_GLOBAL             ",  0x300000},
+       {"QM_AM_CURR_PORT_STS           ",  0x300100},
+       {"QM_AM_CURR_TRANS_RETURN       ",  0x300150},
+       {"QM_AM_CURR_RD_MAX_TXID        ",  0x300154},
+       {"QM_AM_CURR_WR_MAX_TXID        ",  0x300158},
+       {"QM_AM_ALARM_RRESP             ",  0x300180},
+       {"QM_AM_ALARM_BRESP             ",  0x300184},
 };
 
 static const struct debugfs_reg32 qm_vf_dfx_regs[] = {