OMAP34xx, AM3517 and OMAP36xx platforms use dpll1 clock.
OMAP443x, OMAP446x, OMAP447x, OMAP5, DRA7, AM43xx platforms use
dpll_mpu clock.
Latency used is the generic latency defined in omap-cpufreq
driver.
Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
                                275000  1125000
                        >;
                        voltage-tolerance = <2>; /* 2 percentage */
+
+                       clocks = <&dpll_mpu_ck>;
+                       clock-names = "cpu";
+
                        clock-latency = <300000>; /* From omap-cpufreq driver */
                };
        };
 
                        compatible = "arm,cortex-a9";
                        device_type = "cpu";
                        reg = <0>;
+
+                       clocks = <&dpll_mpu_ck>;
+                       clock-names = "cpu";
+
+                       clock-latency = <300000>; /* From omap-cpufreq driver */
                };
        };
 
 
                                1000000 1060000
                                1176000 1160000
                                >;
+
+                       clocks = <&dpll_mpu_ck>;
+                       clock-names = "cpu";
+
+                       clock-latency = <300000>; /* From omap-cpufreq driver */
                };
                cpu@1 {
                        device_type = "cpu";
 
                        compatible = "arm,cortex-a8";
                        device_type = "cpu";
                        reg = <0x0>;
+
+                       clocks = <&dpll1_ck>;
+                       clock-names = "cpu";
+
+                       clock-latency = <300000>; /* From omap-cpufreq driver */
                };
        };
 
 
                        device_type = "cpu";
                        next-level-cache = <&L2>;
                        reg = <0x0>;
+
+                       clocks = <&dpll_mpu_ck>;
+                       clock-names = "cpu";
+
+                       clock-latency = <300000>; /* From omap-cpufreq driver */
                };
                cpu@1 {
                        compatible = "arm,cortex-a9";
 
                                1000000 1060000
                                1500000 1250000
                        >;
+
+                       clocks = <&dpll_mpu_ck>;
+                       clock-names = "cpu";
+
+                       clock-latency = <300000>; /* From omap-cpufreq driver */
+
                        /* cooling options */
                        cooling-min-level = <0>;
                        cooling-max-level = <2>;