]> www.infradead.org Git - users/hch/misc.git/commitdiff
dt-bindings: net: dsa: nxp,sja1105: Add reset-gpios property
authorJonas Rebmann <jre@pengutronix.de>
Wed, 24 Sep 2025 08:34:12 +0000 (10:34 +0200)
committerJakub Kicinski <kuba@kernel.org>
Fri, 26 Sep 2025 22:19:22 +0000 (15:19 -0700)
Both the nxp,sja1105 and the nxp,sja1110 series feature an active-low
reset pin, rendering reset-gpios a valid property for all of the
nxp,sja1105 family.

Acked-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Jonas Rebmann <jre@pengutronix.de>
Link: https://patch.msgid.link/20250924-imx8mp-prt8ml-v3-1-f498d7f71a94@pengutronix.de
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Documentation/devicetree/bindings/net/dsa/nxp,sja1105.yaml

index 9432565f4f5d384a3b401d1e44e0a64f1a59dfde..e9dd914b0734c48362a5e563541fe6b7ee2ac809 100644 (file)
@@ -32,6 +32,15 @@ properties:
   reg:
     maxItems: 1
 
+  reset-gpios:
+    description:
+      A GPIO connected to the active-low RST_N pin of the SJA1105. Note that
+      reset of this chip is performed via SPI and the RST_N pin must be wired
+      to satisfy the power-up sequence documented in "SJA1105PQRS Application
+      Hints" (AH1704) sec. 2.4.4. Connecting the SJA1105 RST_N pin to a GPIO is
+      therefore discouraged.
+    maxItems: 1
+
   spi-cpha: true
   spi-cpol: true