Patch by Jon Diekema, 28 Dec 2001

- Improved MII debug messages
- Fix typo / extend MODCK_H/MODCK[1-3] table for SBC8260 board

diff --git a/CHANGELOG b/CHANGELOG
index 9474966ca907922f7f77f1d2df128defd1617bc4..64a9bd5b78f718b0b794371f49655f558cdf7deb 100644 (file)
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -52,6 +52,14 @@ To do:
 * "last user address" is set even if bootp is used without parameters
   (and it uses default address).
 
+======================================================================
+Modifications for 1.1.4:
+======================================================================
+
+* Patch by Jon Diekema, 28 Dec 2001
+  - Improved MII debug messages
+  - Fix typo / extend MODCK_H/MODCK[1-3] table for SBC8260 board
+
 ======================================================================
 Modifications for 1.1.3:
 ======================================================================

diff --git a/common/miiphybb.c b/common/miiphybb.c
index 7985be29f0e90c3221ae665e4797aaf63ecf07fe..3328aeabfff2e114c1cb731f6c4c2e4f930949f3 100644 (file)
--- a/common/miiphybb.c
+++ b/common/miiphybb.c
@@ -38,9 +38,9 @@
  * Utility to send the preamble, address, and register (common to read
  * and write).
  */
-static void miiphy_pre(char           read,
-                       unsigned char  addr,
-                       unsigned char  reg)
+static void miiphy_pre(char          read,
+                      unsigned char  addr,
+                      unsigned char  reg)
 {
   int   j;     /* counter */
   volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, MDIO_PORT);
@@ -114,8 +114,8 @@ static void miiphy_pre(char           read,
  *   0 on success
  */
 int miiphy_read(unsigned char  addr,
-                unsigned char  reg,
-                unsigned short *value)
+               unsigned char  reg,
+               unsigned short *value)
 {
   short rdreg; /* register working value */
   int   j;     /* counter */
@@ -153,6 +153,11 @@ int miiphy_read(unsigned char  addr,
   }
 
   *value = rdreg;
+
+#ifdef DEBUG
+  printf ("miiphy_read(0x%x) @ 0x%x = 0x%04x\n", reg, addr, *value);
+#endif
+
   return 0;
 }
 
@@ -165,8 +170,8 @@ int miiphy_read(unsigned char  addr,
  *   0 on success
  */
 int miiphy_write(unsigned char  addr,
-                 unsigned char  reg,
-                 unsigned short value)
+                unsigned char  reg,
+                unsigned short value)
 {
   int   j;     /* counter */
   volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, MDIO_PORT);

diff --git a/common/miiphyutil.c b/common/miiphyutil.c
index a3f4666711af1ac9d96e53a1397659ddfbe447c9..753e5007eee7956b3a18738591efe81d7b8168a9 100644 (file)
--- a/common/miiphyutil.c
+++ b/common/miiphyutil.c
@@ -31,9 +31,6 @@
 
 #ifdef CONFIG_MII
 
-#undef DEBUG   /* define for more debug messages */
-
-
 /*****************************************************************************
  *
  * Read the OUI, manufacture's model number, and revision number.
@@ -45,37 +42,41 @@
  * Returns:
  *   0 on success
  */
-int miiphy_info(unsigned char addr,
-                unsigned int  *oui,
-                unsigned char *model,
-                unsigned char *rev)
+int miiphy_info (unsigned char addr,
+                unsigned int *oui,
+                unsigned char *model, unsigned char *rev)
 {
-  unsigned int  reg;
-
-  /*
-   * Trick: we are reading two 16 registers into a 32 bit variable
-   * so we do a 16 read into the high order bits of the variable (big
-   * endian, you know), shift it down 16 bits, and the read the rest.
-   */
-  if(miiphy_read(addr, PHY_PHYIDR2, (unsigned short *)&reg) != 0)
-  {
-#   ifdef DEBUG
-      printf("PHY ID register 2 read failed\n");
-#   endif
-    return(-1);
-  }
-  reg >>= 16;
-  if(miiphy_read(addr, PHY_PHYIDR1, (unsigned short *)&reg) != 0)
-  {
-#   ifdef DEBUG
-      printf("PHY ID register 1 read failed\n");
-#   endif
-    return(-1);
-  }
-  *oui   =                 (reg >> 10);
-  *model = (unsigned char)((reg >>  4) & 0x0000003F);
-  *rev   = (unsigned char)( reg        & 0x0000000F);
-  return(0);
+       unsigned int reg = 0;
+
+       /*
+        * Trick: we are reading two 16 registers into a 32 bit variable
+        * so we do a 16 read into the high order bits of the variable (big
+        * endian, you know), shift it down 16 bits, and the read the rest.
+        */
+       if (miiphy_read (addr, PHY_PHYIDR2, (unsigned short *) &reg) != 0) {
+#ifdef DEBUG
+               printf ("PHY ID register 2 read failed\n");
+#endif
+               return (-1);
+       }
+       reg >>= 16;
+#ifdef DEBUG
+       printf ("PHY_PHYIDR2 @ 0x%x = 0x%04x\n", addr, reg);
+#endif
+
+       if (miiphy_read (addr, PHY_PHYIDR1, (unsigned short *) &reg) != 0) {
+#ifdef DEBUG
+               printf ("PHY ID register 1 read failed\n");
+#endif
+               return (-1);
+       }
+#ifdef DEBUG
+       printf ("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg);
+#endif
+       *oui   =                 ( reg >> 10);
+       *model = (unsigned char) ((reg >>  4) & 0x0000003F);
+       *rev   = (unsigned char) ( reg        & 0x0000000F);
+       return (0);
 }
 
 
@@ -85,46 +86,40 @@ int miiphy_info(unsigned char addr,
  * Returns:
  *   0 on success
  */
-int miiphy_reset(unsigned char addr)
+int miiphy_reset (unsigned char addr)
 {
-  unsigned short reg;
-  int      loop_cnt;
-
-  if(miiphy_write(addr, PHY_BMCR, 0x8000) != 0)
-  {
-#   ifdef DEBUG
-      printf("PHY reset failed\n");
-#   endif
-    return(-1);
-  }
-
-  /*
-   * Poll the control register for the reset bit to go to 0 (it is
-   * auto-clearing).  This should happen within 0.5 seconds per the
-   * IEEE spec.
-   */
-  loop_cnt = 0;
-  reg      = 0x8000;
-  while(((reg & 0x8000) != 0) && (loop_cnt++ < 1000000))
-  {
-    if(miiphy_read(addr, PHY_BMCR, &reg) != 0)
-    {
+       unsigned short reg;
+       int loop_cnt;
+
+       if (miiphy_write (addr, PHY_BMCR, 0x8000) != 0) {
+#ifdef DEBUG
+               printf ("PHY reset failed\n");
+#endif
+               return (-1);
+       }
+
+       /*
+        * Poll the control register for the reset bit to go to 0 (it is
+        * auto-clearing).  This should happen within 0.5 seconds per the
+        * IEEE spec.
+        */
+       loop_cnt = 0;
+       reg = 0x8000;
+       while (((reg & 0x8000) != 0) && (loop_cnt++ < 1000000)) {
+               if (miiphy_read (addr, PHY_BMCR, &reg) != 0) {
 #     ifdef DEBUG
-        printf("PHY status read failed\n");
+                       printf ("PHY status read failed\n");
 #     endif
-      return(-1);
-    }
-  }
-  if((reg & 0x8000) == 0)
-  {
-    return(0);
-  }
-  else
-  {
-    printf("PHY reset timed out\n");
-    return(-1);
-  }
-  return(0);
+                       return (-1);
+               }
+       }
+       if ((reg & 0x8000) == 0) {
+               return (0);
+       } else {
+               printf ("PHY reset timed out\n");
+               return (-1);
+       }
+       return (0);
 }
 
 
@@ -132,24 +127,20 @@ int miiphy_reset(unsigned char addr)
  *
  * Determine the ethernet speed (10/100).
  */
-int miiphy_speed(unsigned char addr)
+int miiphy_speed (unsigned char addr)
 {
-  unsigned short reg;
-
-  if(miiphy_read(addr, PHY_ANLPAR, &reg))
-  {
-    printf("PHY speed1 read failed, assuming 10bT\n");
-    return(_10BASET);
-  }
-
-  if((reg & PHY_ANLPAR_100) != 0)
-  {
-    return(_100BASET);
-  }
-  else
-  {
-    return(_10BASET);
-  }
+       unsigned short reg;
+
+       if (miiphy_read (addr, PHY_ANLPAR, &reg)) {
+               printf ("PHY speed1 read failed, assuming 10bT\n");
+               return (_10BASET);
+       }
+
+       if ((reg & PHY_ANLPAR_100) != 0) {
+               return (_100BASET);
+       } else {
+               return (_10BASET);
+       }
 }
 
 
@@ -157,25 +148,20 @@ int miiphy_speed(unsigned char addr)
  *
  * Determine full/half duplex.
  */
-int miiphy_duplex(unsigned char addr)
+int miiphy_duplex (unsigned char addr)
 {
-  unsigned short reg;
-
-  if(miiphy_read(addr, PHY_ANLPAR, &reg))
-  {
-    printf("PHY duplex read failed, assuming half duplex\n");
-    return(HALF);
-  }
-
-  if((reg & (PHY_ANLPAR_10FD | PHY_ANLPAR_TXFD)) != 0)
-  {
-    return(FULL);
-  }
-  else
-  {
-    return(HALF);
-  }
+       unsigned short reg;
+
+       if (miiphy_read (addr, PHY_ANLPAR, &reg)) {
+               printf ("PHY duplex read failed, assuming half duplex\n");
+               return (HALF);
+       }
+
+       if ((reg & (PHY_ANLPAR_10FD | PHY_ANLPAR_TXFD)) != 0) {
+               return (FULL);
+       } else {
+               return (HALF);
+       }
 }
 
-#endif /* CONFIG_MII */
-
+#endif                                                 /* CONFIG_MII */

diff --git a/include/config_sbc8260.h b/include/config_sbc8260.h
index 0d2145512ae82a0412c5b3cd82d18c06406b52b7..a1b051f0e9f212cff0c31bb38ccc55820ce52a55 100644 (file)
--- a/include/config_sbc8260.h
+++ b/include/config_sbc8260.h
@@ -10,7 +10,7 @@
  * Advent Networks, Inc. <http://www.adventnetworks.com>
  * Jay Monkman <jtm@smoothsmoothie.com>
  *
- * Configuation settings for the WindRiver SBC8260 board.
+ * Configuration settings for the WindRiver SBC8260 board.
  *     See http://www.windriver.com/products/html/sbc8260.html
  *
  * See file CREDITS for list of people who contributed to this
@@ -57,6 +57,10 @@
  *
  * MODCK_H   MODCK[1-3]         Osc    CPM    Core  S2-6   S2-7   S2-8
  * -------   ----------         ---    ---    ----  -----  -----  -----
+ * 0x1      0x5         33     100    133   Open   Close  Open
+ * 0x1      0x6         33     100    166   Open   Open   Close
+ * 0x1      0x7         33     100    200   Open   Open   Open
+ *
  * 0x2      0x2         33     133    133   Close  Open   Close
  * 0x2      0x3         33     133    166   Close  Open   Open
  * 0x2      0x4         33     133    200   Open   Close  Close

diff --git a/include/version.h b/include/version.h
index 64eb4bb6853681ee2e36354a58cb77090ccc7767..f318373c481359fb91346457701b9afbc8416c29 100644 (file)
--- a/include/version.h
+++ b/include/version.h
@@ -24,6 +24,6 @@
 #ifndef        __VERSION_H__
 #define        __VERSION_H__
 
-#define        PPCBOOT_VERSION "PPCBoot 1.1.3"
+#define        PPCBOOT_VERSION "PPCBoot 1.1.4"
 
 #endif /* __VERSION_H__ */