Now that the 'register_type' field of the 'sh_eth' driver's platform data is not
used by the driver anymore, it's time to remove it and  its initializers from
the SH platform code. Also  move *enum* declaring values for this  field from
<linux/sh_eth.h>  to  the  local driver's  header file as they're only needed
by the driver itself  now...
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
 static struct sh_eth_plat_data sh_eth_platdata = {
        .phy                    = 0x00, /* LAN8710A */
        .edmac_endian           = EDMAC_LITTLE_ENDIAN,
-       .register_type          = SH_ETH_REG_GIGABIT,
        .phy_interface          = PHY_INTERFACE_MODE_MII,
 };
 
 
 static struct sh_eth_plat_data ether_platform_data __initdata = {
        .phy            = 0x01,
        .edmac_endian   = EDMAC_LITTLE_ENDIAN,
-       .register_type  = SH_ETH_REG_FAST_RCAR,
        .phy_interface  = PHY_INTERFACE_MODE_RMII,
        /*
         * Although the LINK signal is available on the board, it's connected to
 
 static struct sh_eth_plat_data sh7763_eth_pdata = {
        .phy = 0,
        .edmac_endian = EDMAC_LITTLE_ENDIAN,
-       .register_type = SH_ETH_REG_GIGABIT,
        .phy_interface = PHY_INTERFACE_MODE_MII,
 };
 
 
 static struct sh_eth_plat_data sh7757_eth0_pdata = {
        .phy = 1,
        .edmac_endian = EDMAC_LITTLE_ENDIAN,
-       .register_type = SH_ETH_REG_FAST_SH4,
        .set_mdio_gate = sh7757_eth_set_mdio_gate,
 };
 
 static struct sh_eth_plat_data sh7757_eth1_pdata = {
        .phy = 1,
        .edmac_endian = EDMAC_LITTLE_ENDIAN,
-       .register_type = SH_ETH_REG_FAST_SH4,
        .set_mdio_gate = sh7757_eth_set_mdio_gate,
 };
 
 static struct sh_eth_plat_data sh7757_eth_giga0_pdata = {
        .phy = 18,
        .edmac_endian = EDMAC_LITTLE_ENDIAN,
-       .register_type = SH_ETH_REG_GIGABIT,
        .set_mdio_gate = sh7757_eth_giga_set_mdio_gate,
        .phy_interface = PHY_INTERFACE_MODE_RGMII_ID,
 };
 static struct sh_eth_plat_data sh7757_eth_giga1_pdata = {
        .phy = 19,
        .edmac_endian = EDMAC_LITTLE_ENDIAN,
-       .register_type = SH_ETH_REG_GIGABIT,
        .set_mdio_gate = sh7757_eth_giga_set_mdio_gate,
        .phy_interface = PHY_INTERFACE_MODE_RGMII_ID,
 };
 
 static struct sh_eth_plat_data sh_eth_plat = {
        .phy = 0x1f, /* SMSC LAN8700 */
        .edmac_endian = EDMAC_LITTLE_ENDIAN,
-       .register_type = SH_ETH_REG_FAST_SH4,
        .phy_interface = PHY_INTERFACE_MODE_MII,
        .ether_link_active_low = 1
 };
 
 static struct sh_eth_plat_data sh_eth_plat = {
        .phy = 0x1f, /* SMSC LAN8187 */
        .edmac_endian = EDMAC_LITTLE_ENDIAN,
-       .register_type = SH_ETH_REG_FAST_SH4,
        .phy_interace = PHY_INTERFACE_MODE_MII,
 };
 
 
 static struct sh_eth_plat_data sh7763_eth_pdata = {
        .phy = 1,
        .edmac_endian = EDMAC_LITTLE_ENDIAN,
-       .register_type = SH_ETH_REG_GIGABIT,
        .phy_interface = PHY_INTERFACE_MODE_MII,
 };
 
 
 static struct sh_eth_plat_data eth_platform_data = {
        .phy            = 1,
        .edmac_endian   = EDMAC_LITTLE_ENDIAN,
-       .register_type  = SH_ETH_REG_FAST_SH3_SH2,
        .phy_interace   = PHY_INTERFACE_MODE_MII,
 };
 
 
        SH_ETH_MAX_REGISTER_OFFSET,
 };
 
+enum {
+       SH_ETH_REG_GIGABIT,
+       SH_ETH_REG_FAST_RCAR,
+       SH_ETH_REG_FAST_SH4,
+       SH_ETH_REG_FAST_SH3_SH2
+};
+
 /* Driver's parameters */
 #if defined(CONFIG_CPU_SH4) || defined(CONFIG_ARCH_SHMOBILE)
 #define SH4_SKB_RX_ALIGN       32
 
 #include <linux/if_ether.h>
 
 enum {EDMAC_LITTLE_ENDIAN, EDMAC_BIG_ENDIAN};
-enum {
-       SH_ETH_REG_GIGABIT,
-       SH_ETH_REG_FAST_RCAR,
-       SH_ETH_REG_FAST_SH4,
-       SH_ETH_REG_FAST_SH3_SH2
-};
 
 struct sh_eth_plat_data {
        int phy;
        int edmac_endian;
-       int register_type;
        phy_interface_t phy_interface;
        void (*set_mdio_gate)(void *addr);