drm/amdgpu: Remove ppatomfwctrl deadcode

pp_atomfwctrl_get_pp_assign_pin() and pp_atomfwctrl_get_pp_assign_pin()
were added in 2017 by
commit 0d2c7569e196 ("drm/amdgpu: add new atomfirmware based helpers for
powerplay")
but have remained unused.

Remove them, and the helper functions they used.

Signed-off-by: Dr. David Alan Gilbert <linux@treblig.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ppatomfwctrl.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ppatomfwctrl.c
index 82d540334318d29111ec27fa7dedba47f0f36a13..6120f14caab08ea737fda7202050c650feb35d1a 100644 (file)
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ppatomfwctrl.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ppatomfwctrl.c
@@ -158,84 +158,6 @@ int pp_atomfwctrl_get_voltage_table_v4(struct pp_hwmgr *hwmgr,
        return result;
 }
 
- 
-static struct atom_gpio_pin_lut_v2_1 *pp_atomfwctrl_get_gpio_lookup_table(
-               struct pp_hwmgr *hwmgr)
-{
-       const void *table_address;
-       uint16_t idx;
-
-       idx = GetIndexIntoMasterDataTable(gpio_pin_lut);
-       table_address = smu_atom_get_data_table(hwmgr->adev,
-                       idx, NULL, NULL, NULL);
-       PP_ASSERT_WITH_CODE(table_address,
-                       "Error retrieving BIOS Table Address!",
-                       return NULL);
-
-       return (struct atom_gpio_pin_lut_v2_1 *)table_address;
-}
-
-static bool pp_atomfwctrl_lookup_gpio_pin(
-               struct atom_gpio_pin_lut_v2_1 *gpio_lookup_table,
-               const uint32_t pin_id,
-               struct pp_atomfwctrl_gpio_pin_assignment *gpio_pin_assignment)
-{
-       unsigned int size = le16_to_cpu(
-                       gpio_lookup_table->table_header.structuresize);
-       unsigned int offset =
-                       offsetof(struct atom_gpio_pin_lut_v2_1, gpio_pin[0]);
-       unsigned long start = (unsigned long)gpio_lookup_table;
-
-       while (offset < size) {
-               const struct  atom_gpio_pin_assignment *pin_assignment =
-                               (const struct  atom_gpio_pin_assignment *)(start + offset);
-
-               if (pin_id == pin_assignment->gpio_id)  {
-                       gpio_pin_assignment->uc_gpio_pin_bit_shift =
-                                       pin_assignment->gpio_bitshift;
-                       gpio_pin_assignment->us_gpio_pin_aindex =
-                                       le16_to_cpu(pin_assignment->data_a_reg_index);
-                       return true;
-               }
-               offset += offsetof(struct atom_gpio_pin_assignment, gpio_id) + 1;
-       }
-       return false;
-}
-
-/*
- * Returns TRUE if the given pin id find in lookup table.
- */
-bool pp_atomfwctrl_get_pp_assign_pin(struct pp_hwmgr *hwmgr,
-               const uint32_t pin_id,
-               struct pp_atomfwctrl_gpio_pin_assignment *gpio_pin_assignment)
-{
-       bool ret = false;
-       struct atom_gpio_pin_lut_v2_1 *gpio_lookup_table =
-                       pp_atomfwctrl_get_gpio_lookup_table(hwmgr);
-
-       /* If we cannot find the table do NOT try to control this voltage. */
-       PP_ASSERT_WITH_CODE(gpio_lookup_table,
-                       "Could not find GPIO lookup Table in BIOS.",
-                       return false);
-
-       ret = pp_atomfwctrl_lookup_gpio_pin(gpio_lookup_table,
-                       pin_id, gpio_pin_assignment);
-
-       return ret;
-}
-
-/*
- * Enter to SelfRefresh mode.
- * @param hwmgr
- */
-int pp_atomfwctrl_enter_self_refresh(struct pp_hwmgr *hwmgr)
-{
-       /* 0 - no action
-        * 1 - leave power to video memory always on
-        */
-       return 0;
-}
-
 /** pp_atomfwctrl_get_gpu_pll_dividers_vega10().
  *
  * @param hwmgr       input parameter: pointer to HwMgr

diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ppatomfwctrl.h b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ppatomfwctrl.h
index e86e05c786d9fa863dd7f1a81cb5a061f697ef21..0d62903d567616f754a78637fc75f3385105d1ed 100644 (file)
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ppatomfwctrl.h
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ppatomfwctrl.h
@@ -217,9 +217,6 @@ struct pp_atomfwctrl_smc_dpm_parameters {
 int pp_atomfwctrl_get_gpu_pll_dividers_vega10(struct pp_hwmgr *hwmgr,
                uint32_t clock_type, uint32_t clock_value,
                struct pp_atomfwctrl_clock_dividers_soc15 *dividers);
-int pp_atomfwctrl_enter_self_refresh(struct pp_hwmgr *hwmgr);
-bool pp_atomfwctrl_get_pp_assign_pin(struct pp_hwmgr *hwmgr, const uint32_t pin_id,
-               struct pp_atomfwctrl_gpio_pin_assignment *gpio_pin_assignment);
 
 int pp_atomfwctrl_get_voltage_table_v4(struct pp_hwmgr *hwmgr, uint8_t voltage_type,
                uint8_t voltage_mode, struct pp_atomfwctrl_voltage_table *voltage_table);