drm/amd/display: Expand DML2 callbacks

[Why&How]
These additional callbacks to DC will be required for the DML2 wrapper. Also
consolidate common callbacks for projects to a single location for maintenance.

Reviewed-by: Chaitanya Dhere <chaitanya.dhere@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Dillon Varone <dillon.varone@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
index 96b4f68ec374b63971c28faa37a7a00d67b1aae4..ce56e47cfd0a8255bc70a2c85e93c3cd395ace94 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
@@ -4993,3 +4993,36 @@ bool check_subvp_sw_cursor_fallback_req(const struct dc *dc, struct dc_stream_st
 
        return false;
 }
+
+void resource_init_common_dml2_callbacks(struct dc *dc, struct dml2_configuration_options *dml2_options)
+{
+       dml2_options->callbacks.dc = dc;
+       dml2_options->callbacks.build_scaling_params = &resource_build_scaling_params;
+       dml2_options->callbacks.acquire_secondary_pipe_for_mpc_odm = &dc_resource_acquire_secondary_pipe_for_mpc_odm_legacy;
+       dml2_options->callbacks.update_pipes_for_stream_with_slice_count = &resource_update_pipes_for_stream_with_slice_count;
+       dml2_options->callbacks.update_pipes_for_plane_with_slice_count = &resource_update_pipes_for_plane_with_slice_count;
+       dml2_options->callbacks.get_mpc_slice_index = &resource_get_mpc_slice_index;
+       dml2_options->callbacks.get_odm_slice_index = &resource_get_odm_slice_index;
+       dml2_options->callbacks.get_opp_head = &resource_get_opp_head;
+       dml2_options->callbacks.get_otg_master_for_stream = &resource_get_otg_master_for_stream;
+       dml2_options->callbacks.get_opp_heads_for_otg_master = &resource_get_opp_heads_for_otg_master;
+       dml2_options->callbacks.get_dpp_pipes_for_plane = &resource_get_dpp_pipes_for_plane;
+       dml2_options->callbacks.get_stream_status = &dc_state_get_stream_status;
+       dml2_options->callbacks.get_stream_from_id = &dc_state_get_stream_from_id;
+
+       dml2_options->svp_pstate.callbacks.dc = dc;
+       dml2_options->svp_pstate.callbacks.add_phantom_plane = &dc_state_add_phantom_plane;
+       dml2_options->svp_pstate.callbacks.add_phantom_stream = &dc_state_add_phantom_stream;
+       dml2_options->svp_pstate.callbacks.build_scaling_params = &resource_build_scaling_params;
+       dml2_options->svp_pstate.callbacks.create_phantom_plane = &dc_state_create_phantom_plane;
+       dml2_options->svp_pstate.callbacks.remove_phantom_plane = &dc_state_remove_phantom_plane;
+       dml2_options->svp_pstate.callbacks.remove_phantom_stream = &dc_state_remove_phantom_stream;
+       dml2_options->svp_pstate.callbacks.create_phantom_stream = &dc_state_create_phantom_stream;
+       dml2_options->svp_pstate.callbacks.release_phantom_plane = &dc_state_release_phantom_plane;
+       dml2_options->svp_pstate.callbacks.release_phantom_stream = &dc_state_release_phantom_stream;
+       dml2_options->svp_pstate.callbacks.get_pipe_subvp_type = &dc_state_get_pipe_subvp_type;
+       dml2_options->svp_pstate.callbacks.get_stream_subvp_type = &dc_state_get_stream_subvp_type;
+       dml2_options->svp_pstate.callbacks.get_paired_subvp_stream = &dc_state_get_paired_subvp_stream;
+       dml2_options->svp_pstate.callbacks.remove_phantom_streams_and_planes = &dc_state_remove_phantom_streams_and_planes;
+       dml2_options->svp_pstate.callbacks.release_phantom_streams_and_planes = &dc_state_release_phantom_streams_and_planes;
+}

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_state.c b/drivers/gpu/drm/amd/display/dc/core/dc_state.c
index cce4e1c465b6038945748bcf2c48dead29ccd061..c5c078771b15f8a490c522fb54ccc09b988f9c0d 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_state.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_state.c
@@ -585,7 +585,7 @@ bool dc_state_add_all_planes_for_stream(
  */
 struct dc_stream_status *dc_state_get_stream_status(
                struct dc_state *state,
-               struct dc_stream_state *stream)
+               const struct dc_stream_state *stream)
 {
        uint8_t i;
 
@@ -868,3 +868,18 @@ void dc_state_release_phantom_streams_and_planes(
        for (i = 0; i < state->phantom_plane_count; i++)
                dc_state_release_phantom_plane(dc, state, state->phantom_planes[i]);
 }
+
+struct dc_stream_state *dc_state_get_stream_from_id(const struct dc_state *state, unsigned int id)
+{
+       struct dc_stream_state *stream = NULL;
+       int i;
+
+       for (i = 0; i < state->stream_count; i++) {
+               if (state->streams[i] && state->streams[i]->stream_id == id) {
+                       stream = state->streams[i];
+                       break;
+               }
+       }
+
+       return stream;
+}

diff --git a/drivers/gpu/drm/amd/display/dc/dc_state.h b/drivers/gpu/drm/amd/display/dc/dc_state.h
index d167fdbfa8a970dfb3b1c4f1827963f04897e22e..631d1a57263c013e8daa5fc177d78697c1dc7684 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc_state.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_state.h
@@ -74,5 +74,5 @@ bool dc_state_add_all_planes_for_stream(
 
 struct dc_stream_status *dc_state_get_stream_status(
        struct dc_state *state,
-       struct dc_stream_state *stream);
+       const struct dc_stream_state *stream);
 #endif /* _DC_STATE_H_ */

diff --git a/drivers/gpu/drm/amd/display/dc/dc_state_priv.h b/drivers/gpu/drm/amd/display/dc/dc_state_priv.h
index c1f44e09a6c1bf79841882d0e1ea0a41ce1e5ca5..4da4babf0d18726cc52f1c5d41175d746c00bf7c 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc_state_priv.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_state_priv.h
@@ -29,6 +29,8 @@
 #include "dc_state.h"
 #include "dc_stream.h"
 
+struct dc_stream_state *dc_state_get_stream_from_id(const struct dc_state *state, unsigned int id);
+
 /* Get the type of the provided resource (none, phantom, main) based on the provided
  * context. If the context is unavailable, determine only if phantom or not.
  */

diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource_helpers.c b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource_helpers.c
index f98def6c8c2d23fc630f2c3d873335f5ad31c4ef..c831f6c69a1732ae5ac5bf3364c12afe5aaac6e4 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource_helpers.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource_helpers.c
@@ -35,25 +35,6 @@ static bool is_dual_plane(enum surface_pixel_format format)
        return format >= SURFACE_PIXEL_FORMAT_VIDEO_BEGIN || format == SURFACE_PIXEL_FORMAT_GRPH_RGBE_ALPHA;
 }
 
-
-uint32_t dcn32_helper_mall_bytes_to_ways(
-               struct dc *dc,
-               uint32_t total_size_in_mall_bytes)
-{
-       uint32_t cache_lines_used, lines_per_way, total_cache_lines, num_ways;
-
-       /* add 2 lines for worst case alignment */
-       cache_lines_used = total_size_in_mall_bytes / dc->caps.cache_line_size + 2;
-
-       total_cache_lines = dc->caps.max_cab_allocation_bytes / dc->caps.cache_line_size;
-       lines_per_way = total_cache_lines / dc->caps.cache_num_ways;
-       num_ways = cache_lines_used / lines_per_way;
-       if (cache_lines_used % lines_per_way > 0)
-               num_ways++;
-
-       return num_ways;
-}
-
 uint32_t dcn32_helper_calculate_mall_bytes_for_cursor(
                struct dc *dc,
                struct pipe_ctx *pipe_ctx,
@@ -112,8 +93,10 @@ uint32_t dcn32_helper_calculate_num_ways_for_subvp(
        if (context->bw_ctx.bw.dcn.mall_subvp_size_bytes > 0) {
                if (dc->debug.force_subvp_num_ways) {
                        return dc->debug.force_subvp_num_ways;
+               } else if (dc->res_pool->funcs->calculate_mall_ways_from_bytes) {
+                       return dc->res_pool->funcs->calculate_mall_ways_from_bytes(dc, context->bw_ctx.bw.dcn.mall_subvp_size_bytes);
                } else {
-                       return dcn32_helper_mall_bytes_to_ways(dc, context->bw_ctx.bw.dcn.mall_subvp_size_bytes);
+                       return 0;
                }
        } else {
                return 0;

diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c b/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c
index 72cca367062e163be2dbe41f7af452c515467a54..018cf97c025185d7d3d22eab4a91679b2f5df9dc 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c
+++ b/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c
@@ -681,7 +681,7 @@ static void dml2_apply_debug_options(const struct dc *dc, struct dml2_context *d
        }
 }
 
-bool dml2_validate(const struct dc *in_dc, struct dc_state *context, bool fast_validate)
+bool dml2_validate(struct dc *in_dc, struct dc_state *context, bool fast_validate)
 {
        bool out = false;
 

diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.h b/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.h
index cc662d682fd4de03f475dfcb59ee68541c09b44c..800d2ce4856c1ef636308f75b8322b2c82fec92b 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.h
+++ b/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.h
@@ -88,6 +88,19 @@ struct dml2_dc_callbacks {
        int (*get_odm_slice_index)(const struct pipe_ctx *opp_head);
        int (*get_mpc_slice_index)(const struct pipe_ctx *dpp_pipe);
        struct pipe_ctx *(*get_opp_head)(const struct pipe_ctx *pipe_ctx);
+       struct pipe_ctx *(*get_otg_master_for_stream)(
+               struct resource_context *res_ctx,
+               const struct dc_stream_state *stream);
+       int (*get_opp_heads_for_otg_master)(const struct pipe_ctx *otg_master,
+               struct resource_context *res_ctx,
+               struct pipe_ctx *opp_heads[MAX_PIPES]);
+       int (*get_dpp_pipes_for_plane)(const struct dc_plane_state *plane,
+                       struct resource_context *res_ctx,
+                       struct pipe_ctx *dpp_pipes[MAX_PIPES]);
+       struct dc_stream_status *(*get_stream_status)(
+               struct dc_state *state,
+               const struct dc_stream_state *stream);
+       struct dc_stream_state *(*get_stream_from_id)(const struct dc_state *state, unsigned int id);
 };
 
 struct dml2_dc_svp_callbacks {
@@ -121,6 +134,15 @@ struct dml2_dc_svp_callbacks {
        enum mall_stream_type (*get_pipe_subvp_type)(const struct dc_state *state, const struct pipe_ctx *pipe_ctx);
        enum mall_stream_type (*get_stream_subvp_type)(const struct dc_state *state, const struct dc_stream_state *stream);
        struct dc_stream_state *(*get_paired_subvp_stream)(const struct dc_state *state, const struct dc_stream_state *stream);
+       bool (*remove_phantom_streams_and_planes)(
+                       struct dc *dc,
+                       struct dc_state *state);
+       void (*release_phantom_streams_and_planes)(
+                       struct dc *dc,
+                       struct dc_state *state);
+       unsigned int (*calculate_mall_ways_from_bytes)(
+                               const struct dc *dc,
+                               unsigned int total_size_in_mall_bytes);
 };
 
 struct dml2_clks_table_entry {
@@ -242,7 +264,7 @@ void dml2_reinit(const struct dc *in_dc,
  *          separate dc_states for validation.
  * Return: True if mode is supported, false otherwise.
  */
-bool dml2_validate(const struct dc *in_dc,
+bool dml2_validate(struct dc *in_dc,
                                   struct dc_state *context,
                                   bool fast_validate);
 

diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
index a5e92389615ff136c602dce54ab36285a8ffffb0..367dcaeaf1862d56cf123fe41c323272c770a1f8 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
@@ -239,8 +239,10 @@ static uint32_t dcn32_calculate_cab_allocation(struct dc *dc, struct dc_state *c
        // Convert number of cache lines required to number of ways
        if (dc->debug.force_mall_ss_num_ways > 0) {
                num_ways = dc->debug.force_mall_ss_num_ways;
+       } else if (dc->res_pool->funcs->calculate_mall_ways_from_bytes) {
+               num_ways = dc->res_pool->funcs->calculate_mall_ways_from_bytes(dc, mall_ss_size_bytes);
        } else {
-               num_ways = dcn32_helper_mall_bytes_to_ways(dc, mall_ss_size_bytes);
+               num_ways = 0;
        }
 
        return num_ways;

diff --git a/drivers/gpu/drm/amd/display/dc/inc/core_types.h b/drivers/gpu/drm/amd/display/dc/inc/core_types.h
index 34764094f546fdaec49052a77f194b19d179cae0..a66676c00c6c5567805315d164683913a6004fb2 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/inc/core_types.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/core_types.h
@@ -90,6 +90,9 @@ struct resource_funcs {
        void (*update_soc_for_wm_a)(
                                struct dc *dc, struct dc_state *context);
 
+       unsigned int (*calculate_mall_ways_from_bytes)(
+                               const struct dc *dc,
+                               unsigned int total_size_in_mall_bytes);
        /**
         * @populate_dml_pipes - Populate pipe data struct
         *

diff --git a/drivers/gpu/drm/amd/display/dc/inc/resource.h b/drivers/gpu/drm/amd/display/dc/inc/resource.h
index 77a60aa9f27bbfdfa8a652306e2366dc0eca4345..d17fa73d72a3c666082cacb7cb466fa4514f34ec 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/inc/resource.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/resource.h
@@ -615,4 +615,10 @@ enum dc_status update_dp_encoder_resources_for_test_harness(const struct dc *dc,
                struct pipe_ctx *pipe_ctx);
 
 bool check_subvp_sw_cursor_fallback_req(const struct dc *dc, struct dc_stream_state *stream);
+
+/* Setup dc callbacks for dml2
+ * @dc: the display core structure
+ * @dml2_options: struct to hold callbacks
+ */
+void resource_init_common_dml2_callbacks(struct dc *dc, struct dml2_configuration_options *dml2_options);
 #endif /* DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_ */

diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
index 1c657fe4a9bb34481b4f5138ad260f3612189d51..da15ad845147b946cb0285db5b61cd5c71f89d4e 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
@@ -1912,6 +1912,22 @@ int dcn32_populate_dml_pipes_from_context(
        return pipe_cnt;
 }
 
+unsigned int dcn32_calculate_mall_ways_from_bytes(const struct dc *dc, unsigned int total_size_in_mall_bytes)
+{
+       uint32_t cache_lines_used, lines_per_way, total_cache_lines, num_ways;
+
+       /* add 2 lines for worst case alignment */
+       cache_lines_used = total_size_in_mall_bytes / dc->caps.cache_line_size + 2;
+
+       total_cache_lines = dc->caps.max_cab_allocation_bytes / dc->caps.cache_line_size;
+       lines_per_way = total_cache_lines / dc->caps.cache_num_ways;
+       num_ways = cache_lines_used / lines_per_way;
+       if (cache_lines_used % lines_per_way > 0)
+               num_ways++;
+
+       return num_ways;
+}
+
 static struct dc_cap_funcs cap_funcs = {
        .get_dcc_compression_cap = dcn20_get_dcc_compression_cap,
        .get_subvp_en = dcn32_subvp_in_use,
@@ -1960,6 +1976,7 @@ static struct resource_funcs dcn32_res_pool_funcs = {
        .update_soc_for_wm_a = dcn30_update_soc_for_wm_a,
        .add_phantom_pipes = dcn32_add_phantom_pipes,
        .build_pipe_pix_clk_params = dcn20_build_pipe_pix_clk_params,
+       .calculate_mall_ways_from_bytes = dcn32_calculate_mall_ways_from_bytes,
 };
 
 static uint32_t read_pipe_fuses(struct dc_context *ctx)
@@ -2363,30 +2380,10 @@ static bool dcn32_resource_construct(
        dc->dml2_options.use_native_soc_bb_construction = true;
        dc->dml2_options.minimize_dispclk_using_odm = true;
 
-       dc->dml2_options.callbacks.dc = dc;
-       dc->dml2_options.callbacks.build_scaling_params = &resource_build_scaling_params;
+       resource_init_common_dml2_callbacks(dc, &dc->dml2_options);
        dc->dml2_options.callbacks.can_support_mclk_switch_using_fw_based_vblank_stretch = &dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch;
-       dc->dml2_options.callbacks.acquire_secondary_pipe_for_mpc_odm = &dc_resource_acquire_secondary_pipe_for_mpc_odm_legacy;
-       dc->dml2_options.callbacks.update_pipes_for_stream_with_slice_count = &resource_update_pipes_for_stream_with_slice_count;
-       dc->dml2_options.callbacks.update_pipes_for_plane_with_slice_count = &resource_update_pipes_for_plane_with_slice_count;
-       dc->dml2_options.callbacks.get_mpc_slice_index = &resource_get_mpc_slice_index;
-       dc->dml2_options.callbacks.get_odm_slice_index = &resource_get_odm_slice_index;
-       dc->dml2_options.callbacks.get_opp_head = &resource_get_opp_head;
-
-       dc->dml2_options.svp_pstate.callbacks.dc = dc;
-       dc->dml2_options.svp_pstate.callbacks.add_phantom_plane = &dc_state_add_phantom_plane;
-       dc->dml2_options.svp_pstate.callbacks.add_phantom_stream = &dc_state_add_phantom_stream;
-       dc->dml2_options.svp_pstate.callbacks.build_scaling_params = &resource_build_scaling_params;
-       dc->dml2_options.svp_pstate.callbacks.create_phantom_plane = &dc_state_create_phantom_plane;
-       dc->dml2_options.svp_pstate.callbacks.remove_phantom_plane = &dc_state_remove_phantom_plane;
-       dc->dml2_options.svp_pstate.callbacks.remove_phantom_stream = &dc_state_remove_phantom_stream;
-       dc->dml2_options.svp_pstate.callbacks.create_phantom_stream = &dc_state_create_phantom_stream;
-       dc->dml2_options.svp_pstate.callbacks.release_phantom_plane = &dc_state_release_phantom_plane;
-       dc->dml2_options.svp_pstate.callbacks.release_phantom_stream = &dc_state_release_phantom_stream;
        dc->dml2_options.svp_pstate.callbacks.release_dsc = &dcn20_release_dsc;
-       dc->dml2_options.svp_pstate.callbacks.get_pipe_subvp_type = &dc_state_get_pipe_subvp_type;
-       dc->dml2_options.svp_pstate.callbacks.get_stream_subvp_type = &dc_state_get_stream_subvp_type;
-       dc->dml2_options.svp_pstate.callbacks.get_paired_subvp_stream = &dc_state_get_paired_subvp_stream;
+       dc->dml2_options.svp_pstate.callbacks.calculate_mall_ways_from_bytes = pool->base.funcs->calculate_mall_ways_from_bytes;
 
        dc->dml2_options.svp_pstate.subvp_fw_processing_delay_us = dc->caps.subvp_fw_processing_delay_us;
        dc->dml2_options.svp_pstate.subvp_prefetch_end_to_mall_start_us = dc->caps.subvp_prefetch_end_to_mall_start_us;

diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h b/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
index 2258c5c7212d86902b4352fbf0fe3da01b524c78..286e20ad46ed51f2bb32c945c911332c49c03038 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
+++ b/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
@@ -113,10 +113,6 @@ void dcn32_calculate_wm_and_dlg(
                int pipe_cnt,
                int vlevel);
 
-uint32_t dcn32_helper_mall_bytes_to_ways(
-               struct dc *dc,
-               uint32_t total_size_in_mall_bytes);
-
 uint32_t dcn32_helper_calculate_mall_bytes_for_cursor(
                struct dc *dc,
                struct pipe_ctx *pipe_ctx,
@@ -184,6 +180,8 @@ void dcn32_update_dml_pipes_odm_policy_based_on_context(struct dc *dc, struct dc
 
 void dcn32_override_min_req_dcfclk(struct dc *dc, struct dc_state *context);
 
+unsigned int dcn32_calculate_mall_ways_from_bytes(const struct dc *dc, unsigned int total_size_in_mall_bytes);
+
 /* definitions for run time init of reg offsets */
 
 /* CLK SRC */

diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c
index 6c8129734163755678596a3651a047c697610473..f7339b1419396831a708d0a12ec790a7cfdbf908 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c
@@ -1610,6 +1610,7 @@ static struct resource_funcs dcn321_res_pool_funcs = {
        .update_soc_for_wm_a = dcn30_update_soc_for_wm_a,
        .add_phantom_pipes = dcn32_add_phantom_pipes,
        .build_pipe_pix_clk_params = dcn20_build_pipe_pix_clk_params,
+       .calculate_mall_ways_from_bytes = dcn32_calculate_mall_ways_from_bytes,
 };
 
 static uint32_t read_pipe_fuses(struct dc_context *ctx)
@@ -2000,30 +2001,10 @@ static bool dcn321_resource_construct(
        dc->dml2_options.use_native_soc_bb_construction = true;
        dc->dml2_options.minimize_dispclk_using_odm = true;
 
-       dc->dml2_options.callbacks.dc = dc;
-       dc->dml2_options.callbacks.build_scaling_params = &resource_build_scaling_params;
+       resource_init_common_dml2_callbacks(dc, &dc->dml2_options);
        dc->dml2_options.callbacks.can_support_mclk_switch_using_fw_based_vblank_stretch = &dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch;
-       dc->dml2_options.callbacks.acquire_secondary_pipe_for_mpc_odm = &dc_resource_acquire_secondary_pipe_for_mpc_odm_legacy;
-       dc->dml2_options.callbacks.update_pipes_for_stream_with_slice_count = &resource_update_pipes_for_stream_with_slice_count;
-       dc->dml2_options.callbacks.update_pipes_for_plane_with_slice_count = &resource_update_pipes_for_plane_with_slice_count;
-       dc->dml2_options.callbacks.get_mpc_slice_index = &resource_get_mpc_slice_index;
-       dc->dml2_options.callbacks.get_odm_slice_index = &resource_get_odm_slice_index;
-       dc->dml2_options.callbacks.get_opp_head = &resource_get_opp_head;
-
-       dc->dml2_options.svp_pstate.callbacks.dc = dc;
-       dc->dml2_options.svp_pstate.callbacks.add_phantom_plane = &dc_state_add_phantom_plane;
-       dc->dml2_options.svp_pstate.callbacks.add_phantom_stream = &dc_state_add_phantom_stream;
-       dc->dml2_options.svp_pstate.callbacks.build_scaling_params = &resource_build_scaling_params;
-       dc->dml2_options.svp_pstate.callbacks.create_phantom_plane = &dc_state_create_phantom_plane;
-       dc->dml2_options.svp_pstate.callbacks.remove_phantom_plane = &dc_state_remove_phantom_plane;
-       dc->dml2_options.svp_pstate.callbacks.remove_phantom_stream = &dc_state_remove_phantom_stream;
-       dc->dml2_options.svp_pstate.callbacks.create_phantom_stream = &dc_state_create_phantom_stream;
-       dc->dml2_options.svp_pstate.callbacks.release_phantom_plane = &dc_state_release_phantom_plane;
-       dc->dml2_options.svp_pstate.callbacks.release_phantom_stream = &dc_state_release_phantom_stream;
        dc->dml2_options.svp_pstate.callbacks.release_dsc = &dcn20_release_dsc;
-       dc->dml2_options.svp_pstate.callbacks.get_pipe_subvp_type = &dc_state_get_pipe_subvp_type;
-       dc->dml2_options.svp_pstate.callbacks.get_stream_subvp_type = &dc_state_get_stream_subvp_type;
-       dc->dml2_options.svp_pstate.callbacks.get_paired_subvp_stream = &dc_state_get_paired_subvp_stream;
+       dc->dml2_options.svp_pstate.callbacks.calculate_mall_ways_from_bytes = pool->base.funcs->calculate_mall_ways_from_bytes;
 
        dc->dml2_options.svp_pstate.subvp_fw_processing_delay_us = dc->caps.subvp_fw_processing_delay_us;
        dc->dml2_options.svp_pstate.subvp_prefetch_end_to_mall_start_us = dc->caps.subvp_prefetch_end_to_mall_start_us;

diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
index 49cccf3c0f9c03d97e3afe53ac5c958360ea76dd..91c6eff792827db69a00a70065152e995551da68 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
@@ -2138,15 +2138,9 @@ static bool dcn35_resource_construct(
                dc->dml2_options.minimize_dispclk_using_odm = true;
        dc->dml2_options.enable_windowed_mpo_odm = dc->config.enable_windowed_mpo_odm;
 
-       dc->dml2_options.callbacks.dc = dc;
-       dc->dml2_options.callbacks.build_scaling_params = &resource_build_scaling_params;
+       resource_init_common_dml2_callbacks(dc, &dc->dml2_options);
        dc->dml2_options.callbacks.can_support_mclk_switch_using_fw_based_vblank_stretch = &dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch;
-       dc->dml2_options.callbacks.acquire_secondary_pipe_for_mpc_odm = &dc_resource_acquire_secondary_pipe_for_mpc_odm_legacy;
-       dc->dml2_options.callbacks.update_pipes_for_stream_with_slice_count = &resource_update_pipes_for_stream_with_slice_count;
-       dc->dml2_options.callbacks.update_pipes_for_plane_with_slice_count = &resource_update_pipes_for_plane_with_slice_count;
-       dc->dml2_options.callbacks.get_mpc_slice_index = &resource_get_mpc_slice_index;
-       dc->dml2_options.callbacks.get_odm_slice_index = &resource_get_odm_slice_index;
-       dc->dml2_options.callbacks.get_opp_head = &resource_get_opp_head;
+
        dc->dml2_options.max_segments_per_hubp = 24;
 
        dc->dml2_options.det_segment_size = DCN3_2_DET_SEG_SIZE;/*todo*/

diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
index fe13c891879b398c29149ae3f829650141ba752c..07ac9f3130b771fe714ca5ae5f6077711289775b 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
@@ -2121,15 +2121,9 @@ static bool dcn351_resource_construct(
                dc->dml2_options.minimize_dispclk_using_odm = true;
        dc->dml2_options.enable_windowed_mpo_odm = dc->config.enable_windowed_mpo_odm;
 
-       dc->dml2_options.callbacks.dc = dc;
-       dc->dml2_options.callbacks.build_scaling_params = &resource_build_scaling_params;
+       resource_init_common_dml2_callbacks(dc, &dc->dml2_options);
        dc->dml2_options.callbacks.can_support_mclk_switch_using_fw_based_vblank_stretch = &dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch;
-       dc->dml2_options.callbacks.acquire_secondary_pipe_for_mpc_odm = &dc_resource_acquire_secondary_pipe_for_mpc_odm_legacy;
-       dc->dml2_options.callbacks.update_pipes_for_stream_with_slice_count = &resource_update_pipes_for_stream_with_slice_count;
-       dc->dml2_options.callbacks.update_pipes_for_plane_with_slice_count = &resource_update_pipes_for_plane_with_slice_count;
-       dc->dml2_options.callbacks.get_mpc_slice_index = &resource_get_mpc_slice_index;
-       dc->dml2_options.callbacks.get_odm_slice_index = &resource_get_odm_slice_index;
-       dc->dml2_options.callbacks.get_opp_head = &resource_get_opp_head;
+
        dc->dml2_options.max_segments_per_hubp = 24;
        dc->dml2_options.det_segment_size = DCN3_2_DET_SEG_SIZE;/*todo*/