long r;
        unsigned long flags;
        struct amdgpu_bo *abo;
-       uint64_t tiling_flags;
-       bool tmz_surface = false;
        uint32_t target_vblank, last_flip_vblank;
        bool vrr_active = amdgpu_dm_vrr_active(acrtc_state);
        bool pflip_present = false;
                if (unlikely(r <= 0))
                        DRM_ERROR("Waiting for fences timed out!");
 
-               /*
-                * We cannot reserve buffers here, which means the normal flag
-                * access functions don't work. Paper over this with READ_ONCE,
-                * but maybe the flags are invariant enough that not even that
-                * would be needed.
-                */
-               tiling_flags = READ_ONCE(abo->tiling_flags);
-               tmz_surface = READ_ONCE(abo->flags) & AMDGPU_GEM_CREATE_ENCRYPTED;
-
                fill_dc_plane_info_and_addr(
-                       dm->adev, new_plane_state, tiling_flags,
+                       dm->adev, new_plane_state,
+                       dm_new_plane_state->tiling_flags,
                        &bundle->plane_infos[planes_count],
                        &bundle->flip_addrs[planes_count].address,
-                       tmz_surface,
-                       false);
+                       dm_new_plane_state->tmz_surface, false);
 
                DRM_DEBUG_DRIVER("plane: id=%d dcc_en=%d\n",
                                 new_plane_state->plane->index,