return -ENOMEM;
 
        tr[1].rx_buf = buf;
+
+       spi_bus_lock(spi->controller);
        gpiod_set_value_cansleep(dbi->dc, 0);
 
        spi_message_init_with_transfers(&m, tr, ARRAY_SIZE(tr));
-       ret = spi_sync(spi, &m);
+       ret = spi_sync_locked(spi, &m);
+       spi_bus_unlock(spi->controller);
        if (ret)
                goto err_free;
 
 
        MIPI_DBI_DEBUG_COMMAND(*cmd, par, num);
 
+       spi_bus_lock(spi->controller);
        gpiod_set_value_cansleep(dbi->dc, 0);
        speed_hz = mipi_dbi_spi_cmd_max_speed(spi, 1);
        ret = mipi_dbi_spi_transfer(spi, speed_hz, 8, cmd, 1);
+       spi_bus_unlock(spi->controller);
        if (ret || !num)
                return ret;
 
        if (*cmd == MIPI_DCS_WRITE_MEMORY_START && !dbi->swap_bytes)
                bpw = 16;
 
+       spi_bus_lock(spi->controller);
        gpiod_set_value_cansleep(dbi->dc, 1);
        speed_hz = mipi_dbi_spi_cmd_max_speed(spi, num);
+       ret = mipi_dbi_spi_transfer(spi, speed_hz, bpw, par, num);
+       spi_bus_unlock(spi->controller);
 
-       return mipi_dbi_spi_transfer(spi, speed_hz, bpw, par, num);
+       return ret;
 }
 
 /**
  * @len: Buffer length
  *
  * This SPI transfer helper breaks up the transfer of @buf into chunks which
- * the SPI controller driver can handle.
+ * the SPI controller driver can handle. The SPI bus must be locked when
+ * calling this.
  *
  * Returns:
  * Zero on success, negative error code on failure.
                buf += chunk;
                len -= chunk;
 
-               ret = spi_sync(spi, &m);
+               ret = spi_sync_locked(spi, &m);
                if (ret)
                        return ret;
        }
 
        u32 speed_hz;
        int ret;
 
+       spi_bus_lock(spi->controller);
        gpiod_set_value_cansleep(dbi->dc, 0);
        speed_hz = mipi_dbi_spi_cmd_max_speed(spi, 1);
        ret = mipi_dbi_spi_transfer(spi, speed_hz, 8, cmd, 1);
+       spi_bus_unlock(spi->controller);
        if (ret || !num)
                return ret;
 
        if (*cmd == ILI9225_WRITE_DATA_TO_GRAM && !dbi->swap_bytes)
                bpw = 16;
 
+       spi_bus_lock(spi->controller);
        gpiod_set_value_cansleep(dbi->dc, 1);
        speed_hz = mipi_dbi_spi_cmd_max_speed(spi, num);
+       ret = mipi_dbi_spi_transfer(spi, speed_hz, bpw, par, num);
+       spi_bus_unlock(spi->controller);
 
-       return mipi_dbi_spi_transfer(spi, speed_hz, bpw, par, num);
+       return ret;
 }
 
 static const struct drm_simple_display_pipe_funcs ili9225_pipe_funcs = {
 
         * before being transferred as 8-bit on the big endian SPI bus.
         */
        buf[0] = cpu_to_be16(*cmd);
+       spi_bus_lock(spi->controller);
        gpiod_set_value_cansleep(mipi->dc, 0);
        speed_hz = mipi_dbi_spi_cmd_max_speed(spi, 2);
        ret = mipi_dbi_spi_transfer(spi, speed_hz, 8, buf, 2);
+       spi_bus_unlock(spi->controller);
        if (ret || !num)
                goto free;
 
        if (*cmd == MIPI_DCS_WRITE_MEMORY_START && !mipi->swap_bytes)
                bpw = 16;
 
+       spi_bus_lock(spi->controller);
        gpiod_set_value_cansleep(mipi->dc, 1);
        speed_hz = mipi_dbi_spi_cmd_max_speed(spi, num);
        ret = mipi_dbi_spi_transfer(spi, speed_hz, bpw, data, num);
+       spi_bus_unlock(spi->controller);
  free:
        kfree(buf);