#define MSR_CORE_C1_RES                        0x00000660
 
+#define MSR_CC6_DEMOTION_POLICY_CONFIG 0x00000668
+#define MSR_MC6_DEMOTION_POLICY_CONFIG 0x00000669
+
 #define MSR_AMD64_MC0_MASK             0xc0010044
 
 #define MSR_IA32_MCx_CTL(x)            (MSR_IA32_MC0_CTL + 4*(x))
 
         * Indicate which enable bits to clear here.
         */
        unsigned long auto_demotion_disable_flags;
+       bool byt_auto_demotion_disable_flag;
        bool disable_promotion_to_c1e;
 };
 
 static const struct idle_cpu idle_cpu_byt = {
        .state_table = byt_cstates,
        .disable_promotion_to_c1e = true,
+       .byt_auto_demotion_disable_flag = true,
 };
 
 static const struct idle_cpu idle_cpu_ivb = {
        if (icpu->auto_demotion_disable_flags)
                on_each_cpu(auto_demotion_disable, NULL, 1);
 
+       if (icpu->byt_auto_demotion_disable_flag) {
+               wrmsrl(MSR_CC6_DEMOTION_POLICY_CONFIG, 0);
+               wrmsrl(MSR_MC6_DEMOTION_POLICY_CONFIG, 0);
+       }
+
        if (icpu->disable_promotion_to_c1e)     /* each-cpu is redundant */
                on_each_cpu(c1e_promotion_disable, NULL, 1);