drm/xe/xe2: Add workaround 14019449301

This workaround applies to Xe2_LPM

V3(MattR):
  - Reorder reg and wa placement
  - Add base parameter to reg macro for better definition
V2(MattR):
  - Change name of register
  - Loop for all engines
  - Driver permanent WA, applies to all steps

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Tejas Upadhyay <tejas.upadhyay@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

diff --git a/drivers/gpu/drm/xe/regs/xe_engine_regs.h b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
index b57dec17eb2ddc9c2b48b05c620995ab816c49ce..444ff9b83bb1b0a16cf3c34c743deb703b19f686 100644 (file)
--- a/drivers/gpu/drm/xe/regs/xe_engine_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
@@ -112,6 +112,9 @@
 #define RING_EXECLIST_CONTROL(base)            XE_REG((base) + 0x550)
 #define          EL_CTRL_LOAD                          REG_BIT(0)
 
+#define VDBOX_CGCTL3F08(base)                  XE_REG((base) + 0x3f08)
+#define   CG3DDISHRS_CLKGATE_DIS               REG_BIT(5)
+
 #define VDBOX_CGCTL3F10(base)                  XE_REG((base) + 0x3f10)
 #define   IECPUNIT_CLKGATE_DIS                 REG_BIT(22)
 

diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
index 5ab5529d9624cad95d0a5fe7eac86bd403d6f6ad..81ae0232146e8809fcaeed662cb435b1ebc14250 100644 (file)
--- a/drivers/gpu/drm/xe/xe_wa.c
+++ b/drivers/gpu/drm/xe/xe_wa.c
@@ -287,6 +287,11 @@ static const struct xe_rtp_entry_sr gt_was[] = {
          XE_RTP_ACTIONS(SET(VDBOX_CGCTL3F1C(0), MFXPIPE_CLKGATE_DIS)),
          XE_RTP_ENTRY_FLAG(FOREACH_ENGINE),
        },
+       { XE_RTP_NAME("14019449301"),
+         XE_RTP_RULES(MEDIA_VERSION(2000), ENGINE_CLASS(VIDEO_DECODE)),
+         XE_RTP_ACTIONS(SET(VDBOX_CGCTL3F08(0), CG3DDISHRS_CLKGATE_DIS)),
+         XE_RTP_ENTRY_FLAG(FOREACH_ENGINE),
+       },
 
        {}
 };