ARM: dts: stm32: Add new pinmux for sdmmc1_b4 on stm32mp15

Add another option for the SDMMC_B4 pins.
It is almost identical to sdmmc1_b4_pins_a but the SDMMC1_D2 pin.

This is used on the Phycore STM32MP1.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
index f6661951258a10f5e48c1cc13d2da61050971975..b4f36520f51bb6326939b1f376860715c64cd605 100644 (file)
--- a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
@@ -1596,6 +1596,60 @@
                };
        };
 
+       sdmmc1_b4_pins_b: sdmmc1-b4-1 {
+               pins1 {
+                       pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
+                                <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
+                                <STM32_PINMUX('E', 6, AF8)>, /* SDMMC1_D2 */
+                                <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
+                                <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
+                       slew-rate = <1>;
+                       drive-push-pull;
+                       bias-disable;
+               };
+               pins2 {
+                       pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
+                       slew-rate = <2>;
+                       drive-push-pull;
+                       bias-disable;
+               };
+       };
+
+       sdmmc1_b4_od_pins_b: sdmmc1-b4-od-1 {
+               pins1 {
+                       pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
+                                <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
+                                <STM32_PINMUX('E', 6, AF8)>, /* SDMMC1_D2 */
+                                <STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */
+                       slew-rate = <1>;
+                       drive-push-pull;
+                       bias-disable;
+               };
+               pins2 {
+                       pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
+                       slew-rate = <2>;
+                       drive-push-pull;
+                       bias-disable;
+               };
+               pins3 {
+                       pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
+                       slew-rate = <1>;
+                       drive-open-drain;
+                       bias-disable;
+               };
+       };
+
+       sdmmc1_b4_sleep_pins_b: sdmmc1-b4-sleep-1 {
+               pins {
+                       pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
+                                <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */
+                                <STM32_PINMUX('E', 6, ANALOG)>, /* SDMMC1_D2 */
+                                <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */
+                                <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */
+                                <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */
+               };
+       };
+
        sdmmc1_dir_pins_a: sdmmc1-dir-0 {
                pins1 {
                        pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */