arm64: dts: lx2160a: Fix DTS for full PL011 UART

The prior configuration was an SBSA UART that can't be configured or
modified, or even enabled if it isn't the boot console. With properly
defined clocks, the PL011 configuration can be used.

Signed-off-by: Heinz Wrobel <Heinz.Wrobel@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
index 6640b49670ae5162841536fc0708117616f3218f..e665c629e1a1f6f6bf6d38e4711f3ad47c1da0dd 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
@@ -949,34 +949,50 @@
                };
 
                uart0: serial@21c0000 {
-                       compatible = "arm,sbsa-uart","arm,pl011";
+                       compatible = "arm,pl011", "arm,primecell";
+                       clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(8)>,
+                                <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(8)>;
+                       clock-names = "uartclk", "apb_pclk";
                        reg = <0x0 0x21c0000 0x0 0x1000>;
                        interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
-                       current-speed = <115200>;
                        status = "disabled";
                };
 
                uart1: serial@21d0000 {
-                       compatible = "arm,sbsa-uart","arm,pl011";
+                       compatible = "arm,pl011", "arm,primecell";
+                       clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(8)>,
+                                <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(8)>;
+                       clock-names = "uartclk", "apb_pclk";
                        reg = <0x0 0x21d0000 0x0 0x1000>;
                        interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
-                       current-speed = <115200>;
                        status = "disabled";
                };
 
                uart2: serial@21e0000 {
-                       compatible = "arm,sbsa-uart","arm,pl011";
+                       compatible = "arm,pl011", "arm,primecell";
+                       clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(8)>,
+                                <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(8)>;
+                       clock-names = "uartclk", "apb_pclk";
                        reg = <0x0 0x21e0000 0x0 0x1000>;
                        interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
-                       current-speed = <115200>;
                        status = "disabled";
                };
 
                uart3: serial@21f0000 {
-                       compatible = "arm,sbsa-uart","arm,pl011";
+                       compatible = "arm,pl011", "arm,primecell";
+                       clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(8)>,
+                                <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(8)>;
+                       clock-names = "uartclk", "apb_pclk";
                        reg = <0x0 0x21f0000 0x0 0x1000>;
                        interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
-                       current-speed = <115200>;
                        status = "disabled";
                };