#include "at91_aic.h"
  #include "generic.h"
  
- static void __init sama5_dt_timer_init(void)
 -static int ksz9021rn_phy_fixup(struct phy_device *phy)
--{
- #if defined(CONFIG_COMMON_CLK)
-       of_clk_init(NULL);
- #endif
-       at91sam926x_pit_init();
 -      int value;
 -
 -      /* Set delay values */
 -      value = MICREL_KSZ9021_RGMII_CLK_CTRL_PAD_SCEW | 0x8000;
 -      phy_write(phy, MICREL_KSZ9021_EXTREG_CTRL, value);
 -      value = 0xF2F4;
 -      phy_write(phy, MICREL_KSZ9021_EXTREG_DATA_WRITE, value);
 -      value = MICREL_KSZ9021_RGMII_RX_DATA_PAD_SCEW | 0x8000;
 -      phy_write(phy, MICREL_KSZ9021_EXTREG_CTRL, value);
 -      value = 0x2222;
 -      phy_write(phy, MICREL_KSZ9021_EXTREG_DATA_WRITE, value);
 -
 -      return 0;
--}
--
  static void __init sama5_dt_device_init(void)
  {
 -      if (of_machine_is_compatible("atmel,sama5d3xcm") &&
 -          IS_ENABLED(CONFIG_PHYLIB))
 -              phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
 -                      ksz9021rn_phy_fixup);
 -
        of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
  }
  
 
                at91_boot_soc.map_io();
  }
  
- void __iomem *at91_shdwc_base = NULL;
- 
- static void at91sam9_poweroff(void)
- {
-       at91_shdwc_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
- }
- 
- void __init at91_ioremap_shdwc(u32 base_addr)
- {
-       at91_shdwc_base = ioremap(base_addr, 16);
-       if (!at91_shdwc_base)
-               panic("Impossible to ioremap at91_shdwc_base\n");
-       pm_power_off = at91sam9_poweroff;
- }
- 
- void __iomem *at91_rstc_base;
- 
- void __init at91_ioremap_rstc(u32 base_addr)
- {
-       at91_rstc_base = ioremap(base_addr, 16);
-       if (!at91_rstc_base)
-               panic("Impossible to ioremap at91_rstc_base\n");
- }
- 
 +void __init at91_alt_map_io(void)
 +{
 +      /* Map peripherals */
 +      iotable_init(&at91_alt_io_desc, 1);
 +
 +      at91_soc_initdata.type = AT91_SOC_UNKNOWN;
 +      at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_UNKNOWN;
 +
 +      alt_soc_detect(AT91_BASE_DBGU2);
 +      if (!at91_soc_is_detected())
 +              panic("AT91: Impossible to detect the SOC type");
 +
 +      pr_info("AT91: Detected soc type: %s\n",
 +              at91_get_soc_type(&at91_soc_initdata));
 +      if (at91_soc_initdata.subtype != AT91_SOC_SUBTYPE_NONE)
 +              pr_info("AT91: Detected soc subtype: %s\n",
 +                      at91_get_soc_subtype(&at91_soc_initdata));
 +
 +      if (!at91_soc_is_enabled())
 +              panic("AT91: Soc not enabled");
 +
 +      if (at91_boot_soc.map_io)
 +              at91_boot_soc.map_io();
 +}
 +
  void __iomem *at91_matrix_base;
  EXPORT_SYMBOL_GPL(at91_matrix_base);