union vram_info {
        struct atom_vram_info_header_v2_3 v23;
        struct atom_vram_info_header_v2_4 v24;
+       struct atom_vram_info_header_v2_5 v25;
 };
 
 union vram_module {
        struct atom_vram_module_v9 v9;
        struct atom_vram_module_v10 v10;
+       struct atom_vram_module_v11 v11;
 };
 
 static int convert_atom_mem_type_to_vram_type(struct amdgpu_device *adev,
                                if (vram_vendor)
                                        *vram_vendor = mem_vendor;
                                break;
+                       case 5:
+                               if (module_id > vram_info->v25.vram_module_num)
+                                       module_id = 0;
+                               vram_module = (union vram_module *)vram_info->v25.vram_module;
+                               while (i < module_id) {
+                                       vram_module = (union vram_module *)
+                                               ((u8 *)vram_module + vram_module->v11.vram_module_size);
+                                       i++;
+                               }
+                               mem_type = vram_module->v11.memory_type;
+                               if (vram_type)
+                                       *vram_type = convert_atom_mem_type_to_vram_type(adev, mem_type);
+                               mem_channel_number = vram_module->v11.channel_num;
+                               mem_channel_width = vram_module->v11.channel_width;
+                               if (vram_width)
+                                       *vram_width = mem_channel_number * (1 << mem_channel_width);
+                               mem_vendor = (vram_module->v11.vender_rev_id) & 0xF;
+                               if (vram_vendor)
+                                       *vram_vendor = mem_vendor;
+                               break;
                        default:
                                return -EINVAL;
                        }