int amdgpu_mes_reset_legacy_queue(struct amdgpu_device *adev,
struct amdgpu_ring *ring,
- unsigned int vmid)
+ unsigned int vmid,
+ bool use_mmio)
{
struct mes_reset_legacy_queue_input queue_input;
int r;
struct mes_reset_queue_input {
uint32_t doorbell_offset;
uint64_t gang_context_addr;
+ bool use_mmio;
+ uint32_t queue_type;
+ uint32_t me_id;
+ uint32_t pipe_id;
+ uint32_t queue_id;
+ uint32_t xcc_id;
+ uint32_t vmid;
};
struct mes_map_legacy_queue_input {
struct mes_reset_legacy_queue_input {
uint32_t queue_type;
uint32_t doorbell_offset;
+ bool use_mmio;
+ uint32_t me_id;
uint32_t pipe_id;
uint32_t queue_id;
uint64_t mqd_addr;
int *queue_id);
int amdgpu_mes_remove_hw_queue(struct amdgpu_device *adev, int queue_id);
int amdgpu_mes_reset_hw_queue(struct amdgpu_device *adev, int queue_id);
+int amdgpu_mes_reset_hw_queue_mmio(struct amdgpu_device *adev, int queue_type,
+ int me_id, int pipe_id, int queue_id, int vmid);
int amdgpu_mes_map_legacy_queue(struct amdgpu_device *adev,
struct amdgpu_ring *ring);
u64 gpu_addr, u64 seq);
int amdgpu_mes_reset_legacy_queue(struct amdgpu_device *adev,
struct amdgpu_ring *ring,
- unsigned int vmid);
+ unsigned int vmid,
+ bool use_mmio);
uint32_t amdgpu_mes_rreg(struct amdgpu_device *adev, uint32_t reg);
int amdgpu_mes_wreg(struct amdgpu_device *adev,
struct amdgpu_device *adev = ring->adev;
int r;
- r = amdgpu_mes_reset_legacy_queue(ring->adev, ring, vmid);
+ r = amdgpu_mes_reset_legacy_queue(ring->adev, ring, vmid, false);
if (r)
return r;
struct amdgpu_device *adev = ring->adev;
int r;
- r = amdgpu_mes_reset_legacy_queue(ring->adev, ring, vmid);
+ r = amdgpu_mes_reset_legacy_queue(ring->adev, ring, vmid, false);
if (r) {
dev_err(adev->dev, "reset via MES failed %d\n", r);
return r;