]> www.infradead.org Git - linux.git/commitdiff
drm/amdgpu/mes: modify mes api for mmio queue reset
authorJiadong Zhu <Jiadong.Zhu@amd.com>
Thu, 4 Jul 2024 04:10:59 +0000 (12:10 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 2 Sep 2024 15:41:03 +0000 (11:41 -0400)
Add me/pipe/queue parameters for queue reset input.

v2: fix build (Alex)

Acked-by: Vitaly Prosyak <vitaly.prosyak@amd.com>
Signed-off-by: Jiadong Zhu <Jiadong.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

index 44c74a08987d5d183ad42415b3d1aa5280f25710..0f07902924917240f79942723731f1c56556fba5 100644 (file)
@@ -873,7 +873,8 @@ int amdgpu_mes_unmap_legacy_queue(struct amdgpu_device *adev,
 
 int amdgpu_mes_reset_legacy_queue(struct amdgpu_device *adev,
                                  struct amdgpu_ring *ring,
-                                 unsigned int vmid)
+                                 unsigned int vmid,
+                                 bool use_mmio)
 {
        struct mes_reset_legacy_queue_input queue_input;
        int r;
index 5475e84b23e6632dae80afcae453a17042df2071..96788c0f42f1be6725462bcece58a5c2af64515d 100644 (file)
@@ -252,6 +252,13 @@ struct mes_remove_queue_input {
 struct mes_reset_queue_input {
        uint32_t        doorbell_offset;
        uint64_t        gang_context_addr;
+       bool            use_mmio;
+       uint32_t        queue_type;
+       uint32_t        me_id;
+       uint32_t        pipe_id;
+       uint32_t        queue_id;
+       uint32_t        xcc_id;
+       uint32_t        vmid;
 };
 
 struct mes_map_legacy_queue_input {
@@ -288,6 +295,8 @@ struct mes_resume_gang_input {
 struct mes_reset_legacy_queue_input {
        uint32_t                           queue_type;
        uint32_t                           doorbell_offset;
+       bool                               use_mmio;
+       uint32_t                           me_id;
        uint32_t                           pipe_id;
        uint32_t                           queue_id;
        uint64_t                           mqd_addr;
@@ -397,6 +406,8 @@ int amdgpu_mes_add_hw_queue(struct amdgpu_device *adev, int gang_id,
                            int *queue_id);
 int amdgpu_mes_remove_hw_queue(struct amdgpu_device *adev, int queue_id);
 int amdgpu_mes_reset_hw_queue(struct amdgpu_device *adev, int queue_id);
+int amdgpu_mes_reset_hw_queue_mmio(struct amdgpu_device *adev, int queue_type,
+                                  int me_id, int pipe_id, int queue_id, int vmid);
 
 int amdgpu_mes_map_legacy_queue(struct amdgpu_device *adev,
                                struct amdgpu_ring *ring);
@@ -406,7 +417,8 @@ int amdgpu_mes_unmap_legacy_queue(struct amdgpu_device *adev,
                                  u64 gpu_addr, u64 seq);
 int amdgpu_mes_reset_legacy_queue(struct amdgpu_device *adev,
                                  struct amdgpu_ring *ring,
-                                 unsigned int vmid);
+                                 unsigned int vmid,
+                                 bool use_mmio);
 
 uint32_t amdgpu_mes_rreg(struct amdgpu_device *adev, uint32_t reg);
 int amdgpu_mes_wreg(struct amdgpu_device *adev,
index 2f5eed56892d1e366c6121abb4dc8d53f93c462f..fd0d51e93dd42dd6dad731ad34f70adc269dc3f6 100644 (file)
@@ -6549,7 +6549,7 @@ static int gfx_v11_0_reset_kgq(struct amdgpu_ring *ring, unsigned int vmid)
        struct amdgpu_device *adev = ring->adev;
        int r;
 
-       r = amdgpu_mes_reset_legacy_queue(ring->adev, ring, vmid);
+       r = amdgpu_mes_reset_legacy_queue(ring->adev, ring, vmid, false);
        if (r)
                return r;
 
index b207de46a29b5f315add369bec4a6fbd83d45e73..6e2883e2dbe5a7368a3a57e26cc71ab2cb7cbea4 100644 (file)
@@ -5163,7 +5163,7 @@ static int gfx_v12_0_reset_kgq(struct amdgpu_ring *ring, unsigned int vmid)
        struct amdgpu_device *adev = ring->adev;
        int r;
 
-       r = amdgpu_mes_reset_legacy_queue(ring->adev, ring, vmid);
+       r = amdgpu_mes_reset_legacy_queue(ring->adev, ring, vmid, false);
        if (r) {
                dev_err(adev->dev, "reset via MES failed %d\n", r);
                return r;