int mt8192_dai_pcm_register(struct mtk_base_afe *afe);
 int mt8192_dai_tdm_register(struct mtk_base_afe *afe);
 
+int mt8192_dai_i2s_set_share(struct mtk_base_afe *afe, const char *main_i2s_name,
+                            const char *secondary_i2s_name);
+
 unsigned int mt8192_general_rate_transform(struct device *dev,
                                           unsigned int rate);
 unsigned int mt8192_rate_transform(struct device *dev,
 
        return 0;
 }
 
+/**
+ * mt8192_dai_i2s_set_share() - Set up I2S ports to share a single clock.
+ * @afe: Pointer to &struct mtk_base_afe
+ * @main_i2s_name: The name of the I2S port that will provide the clock
+ * @secondary_i2s_name: The name of the I2S port that will use this clock
+ */
+int mt8192_dai_i2s_set_share(struct mtk_base_afe *afe, const char *main_i2s_name,
+                            const char *secondary_i2s_name)
+{
+       struct mtk_afe_i2s_priv *secondary_i2s_priv;
+       int main_i2s_id;
+
+       secondary_i2s_priv = get_i2s_priv_by_name(afe, secondary_i2s_name);
+       if (!secondary_i2s_priv)
+               return -EINVAL;
+
+       main_i2s_id = get_i2s_id_by_name(afe, main_i2s_name);
+       if (main_i2s_id < 0)
+               return main_i2s_id;
+
+       secondary_i2s_priv->share_i2s_id = main_i2s_id;
+
+       return 0;
+}
+EXPORT_SYMBOL_GPL(mt8192_dai_i2s_set_share);
+
 static int mt8192_dai_i2s_set_priv(struct mtk_base_afe *afe)
 {
        int i;