arm64: dts: imx95-19x19-evk: adjust pinctrl settings for usdhc2

The driver strength is too high for SDR104 mode. Change the driver strength
to x3 according to hardware recommendation.

Signed-off-by: Luke Wang <ziniu.wang_1@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
index ea70ef4e85690015fc076ba8edfbda3e0bfd69b2..b6822b56374c4b8f8f834144eedcfcf309a9b11b 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
@@ -984,12 +984,12 @@
 
        pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
                fsl,pins = <
-                       IMX95_PAD_SD2_CLK__USDHC2_CLK                   0x15fe
-                       IMX95_PAD_SD2_CMD__USDHC2_CMD                   0x13fe
-                       IMX95_PAD_SD2_DATA0__USDHC2_DATA0               0x13fe
-                       IMX95_PAD_SD2_DATA1__USDHC2_DATA1               0x13fe
-                       IMX95_PAD_SD2_DATA2__USDHC2_DATA2               0x13fe
-                       IMX95_PAD_SD2_DATA3__USDHC2_DATA3               0x13fe
+                       IMX95_PAD_SD2_CLK__USDHC2_CLK                   0x158e
+                       IMX95_PAD_SD2_CMD__USDHC2_CMD                   0x138e
+                       IMX95_PAD_SD2_DATA0__USDHC2_DATA0               0x138e
+                       IMX95_PAD_SD2_DATA1__USDHC2_DATA1               0x138e
+                       IMX95_PAD_SD2_DATA2__USDHC2_DATA2               0x138e
+                       IMX95_PAD_SD2_DATA3__USDHC2_DATA3               0x138e
                        IMX95_PAD_SD2_VSELECT__USDHC2_VSELECT           0x51e
                >;
        };