We need to verify that the controller supports the security
commands before actually trying to issue them.
Signed-off-by: Scott Bauer <scott.bauer@intel.com>
[hch: moved the check so that we don't call into the OPAL code if not
      supported]
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Jens Axboe <axboe@fb.com>
                return -EIO;
        }
 
+       ctrl->oacs = le16_to_cpu(id->oacs);
        ctrl->vid = le16_to_cpu(id->vid);
        ctrl->oncs = le16_to_cpup(&id->oncs);
        atomic_set(&ctrl->abort_limit, id->acl + 1);
 
        u32 max_hw_sectors;
        u16 oncs;
        u16 vid;
+       u16 oacs;
        atomic_t abort_limit;
        u8 event_limit;
        u8 vwc;
 
        if (result)
                goto out;
 
-       if (!dev->ctrl.opal_dev) {
+       if ((dev->ctrl.oacs & NVME_CTRL_OACS_SEC_SUPP) && !dev->ctrl.opal_dev) {
                dev->ctrl.opal_dev =
                        init_opal_dev(&dev->ctrl, &nvme_sec_submit);
        }
 
        NVME_CTRL_ONCS_DSM                      = 1 << 2,
        NVME_CTRL_ONCS_WRITE_ZEROES             = 1 << 3,
        NVME_CTRL_VWC_PRESENT                   = 1 << 0,
+       NVME_CTRL_OACS_SEC_SUPP                 = 1 << 0,
 };
 
 struct nvme_lbaf {