arm64: dts: freescale: fix arm,sp805 compatible string

[ Upstream commit 99a7cacc66cae92db40139b57689be2af75fc6b8 ]

According to Documentation/devicetree/bindings/watchdog/arm,sp805.yaml
the compatible is:
  compatible = "arm,sp805", "arm,primecell";

The current compatible string doesn't exist at all. Fix it.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
index a07f612ab56b7be9453b80dd50023f1ded9569b9..b3b87c4c738e62a86bb368356dd1f7149848b4da 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
@@ -584,56 +584,56 @@
                };
 
                cluster1_core0_watchdog: wdt@c000000 {
-                       compatible = "arm,sp805-wdt", "arm,primecell";
+                       compatible = "arm,sp805", "arm,primecell";
                        reg = <0x0 0xc000000 0x0 0x1000>;
                        clocks = <&clockgen 4 3>, <&clockgen 4 3>;
                        clock-names = "apb_pclk", "wdog_clk";
                };
 
                cluster1_core1_watchdog: wdt@c010000 {
-                       compatible = "arm,sp805-wdt", "arm,primecell";
+                       compatible = "arm,sp805", "arm,primecell";
                        reg = <0x0 0xc010000 0x0 0x1000>;
                        clocks = <&clockgen 4 3>, <&clockgen 4 3>;
                        clock-names = "apb_pclk", "wdog_clk";
                };
 
                cluster1_core2_watchdog: wdt@c020000 {
-                       compatible = "arm,sp805-wdt", "arm,primecell";
+                       compatible = "arm,sp805", "arm,primecell";
                        reg = <0x0 0xc020000 0x0 0x1000>;
                        clocks = <&clockgen 4 3>, <&clockgen 4 3>;
                        clock-names = "apb_pclk", "wdog_clk";
                };
 
                cluster1_core3_watchdog: wdt@c030000 {
-                       compatible = "arm,sp805-wdt", "arm,primecell";
+                       compatible = "arm,sp805", "arm,primecell";
                        reg = <0x0 0xc030000 0x0 0x1000>;
                        clocks = <&clockgen 4 3>, <&clockgen 4 3>;
                        clock-names = "apb_pclk", "wdog_clk";
                };
 
                cluster2_core0_watchdog: wdt@c100000 {
-                       compatible = "arm,sp805-wdt", "arm,primecell";
+                       compatible = "arm,sp805", "arm,primecell";
                        reg = <0x0 0xc100000 0x0 0x1000>;
                        clocks = <&clockgen 4 3>, <&clockgen 4 3>;
                        clock-names = "apb_pclk", "wdog_clk";
                };
 
                cluster2_core1_watchdog: wdt@c110000 {
-                       compatible = "arm,sp805-wdt", "arm,primecell";
+                       compatible = "arm,sp805", "arm,primecell";
                        reg = <0x0 0xc110000 0x0 0x1000>;
                        clocks = <&clockgen 4 3>, <&clockgen 4 3>;
                        clock-names = "apb_pclk", "wdog_clk";
                };
 
                cluster2_core2_watchdog: wdt@c120000 {
-                       compatible = "arm,sp805-wdt", "arm,primecell";
+                       compatible = "arm,sp805", "arm,primecell";
                        reg = <0x0 0xc120000 0x0 0x1000>;
                        clocks = <&clockgen 4 3>, <&clockgen 4 3>;
                        clock-names = "apb_pclk", "wdog_clk";
                };
 
                cluster2_core3_watchdog: wdt@c130000 {
-                       compatible = "arm,sp805-wdt", "arm,primecell";
+                       compatible = "arm,sp805", "arm,primecell";
                        reg = <0x0 0xc130000 0x0 0x1000>;
                        clocks = <&clockgen 4 3>, <&clockgen 4 3>;
                        clock-names = "apb_pclk", "wdog_clk";

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
index 8c22ce904e6556f57a83939f53f39ab2e844c6ba..73a60fd516e068df1cd2877551bfe5a3b497b285 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
@@ -222,56 +222,56 @@
                };
 
                cluster1_core0_watchdog: wdt@c000000 {
-                       compatible = "arm,sp805-wdt", "arm,primecell";
+                       compatible = "arm,sp805", "arm,primecell";
                        reg = <0x0 0xc000000 0x0 0x1000>;
                        clocks = <&clockgen 4 3>, <&clockgen 4 3>;
                        clock-names = "apb_pclk", "wdog_clk";
                };
 
                cluster1_core1_watchdog: wdt@c010000 {
-                       compatible = "arm,sp805-wdt", "arm,primecell";
+                       compatible = "arm,sp805", "arm,primecell";
                        reg = <0x0 0xc010000 0x0 0x1000>;
                        clocks = <&clockgen 4 3>, <&clockgen 4 3>;
                        clock-names = "apb_pclk", "wdog_clk";
                };
 
                cluster2_core0_watchdog: wdt@c100000 {
-                       compatible = "arm,sp805-wdt", "arm,primecell";
+                       compatible = "arm,sp805", "arm,primecell";
                        reg = <0x0 0xc100000 0x0 0x1000>;
                        clocks = <&clockgen 4 3>, <&clockgen 4 3>;
                        clock-names = "apb_pclk", "wdog_clk";
                };
 
                cluster2_core1_watchdog: wdt@c110000 {
-                       compatible = "arm,sp805-wdt", "arm,primecell";
+                       compatible = "arm,sp805", "arm,primecell";
                        reg = <0x0 0xc110000 0x0 0x1000>;
                        clocks = <&clockgen 4 3>, <&clockgen 4 3>;
                        clock-names = "apb_pclk", "wdog_clk";
                };
 
                cluster3_core0_watchdog: wdt@c200000 {
-                       compatible = "arm,sp805-wdt", "arm,primecell";
+                       compatible = "arm,sp805", "arm,primecell";
                        reg = <0x0 0xc200000 0x0 0x1000>;
                        clocks = <&clockgen 4 3>, <&clockgen 4 3>;
                        clock-names = "apb_pclk", "wdog_clk";
                };
 
                cluster3_core1_watchdog: wdt@c210000 {
-                       compatible = "arm,sp805-wdt", "arm,primecell";
+                       compatible = "arm,sp805", "arm,primecell";
                        reg = <0x0 0xc210000 0x0 0x1000>;
                        clocks = <&clockgen 4 3>, <&clockgen 4 3>;
                        clock-names = "apb_pclk", "wdog_clk";
                };
 
                cluster4_core0_watchdog: wdt@c300000 {
-                       compatible = "arm,sp805-wdt", "arm,primecell";
+                       compatible = "arm,sp805", "arm,primecell";
                        reg = <0x0 0xc300000 0x0 0x1000>;
                        clocks = <&clockgen 4 3>, <&clockgen 4 3>;
                        clock-names = "apb_pclk", "wdog_clk";
                };
 
                cluster4_core1_watchdog: wdt@c310000 {
-                       compatible = "arm,sp805-wdt", "arm,primecell";
+                       compatible = "arm,sp805", "arm,primecell";
                        reg = <0x0 0xc310000 0x0 0x1000>;
                        clocks = <&clockgen 4 3>, <&clockgen 4 3>;
                        clock-names = "apb_pclk", "wdog_clk";