#define T1_EQ_WT_FD_LCK_FRZ_CFG                0x6D
 #define T1_PST_EQ_LCK_STG1_FRZ_CFG     0x6E
 
+#define T1_MODE_STAT_REG               0x11
+#define T1_LINK_UP_MSK                 BIT(0)
+
 #define DRIVER_AUTHOR  "Nisar Sayed <nisar.sayed@microchip.com>"
 #define DRIVER_DESC    "Microchip LAN87XX/LAN937x T1 PHY driver"
 
        return 0;
 }
 
+static int lan87xx_read_master_slave(struct phy_device *phydev)
+{
+       int rc = 0;
+
+       phydev->master_slave_get = MASTER_SLAVE_CFG_UNKNOWN;
+       phydev->master_slave_state = MASTER_SLAVE_STATE_UNKNOWN;
+
+       rc = phy_read(phydev, MII_CTRL1000);
+       if (rc < 0)
+               return rc;
+
+       if (rc & CTL1000_AS_MASTER)
+               phydev->master_slave_get = MASTER_SLAVE_CFG_MASTER_FORCE;
+       else
+               phydev->master_slave_get = MASTER_SLAVE_CFG_SLAVE_FORCE;
+
+       rc = phy_read(phydev, MII_STAT1000);
+       if (rc < 0)
+               return rc;
+
+       if (rc & LPA_1000MSRES)
+               phydev->master_slave_state = MASTER_SLAVE_STATE_MASTER;
+       else
+               phydev->master_slave_state = MASTER_SLAVE_STATE_SLAVE;
+
+       return rc;
+}
+
+static int lan87xx_read_status(struct phy_device *phydev)
+{
+       int rc = 0;
+
+       rc = phy_read(phydev, T1_MODE_STAT_REG);
+       if (rc < 0)
+               return rc;
+
+       if (rc & T1_LINK_UP_MSK)
+               phydev->link = 1;
+       else
+               phydev->link = 0;
+
+       phydev->speed = SPEED_UNKNOWN;
+       phydev->duplex = DUPLEX_UNKNOWN;
+       phydev->pause = 0;
+       phydev->asym_pause = 0;
+
+       rc = lan87xx_read_master_slave(phydev);
+       if (rc < 0)
+               return rc;
+
+       rc = genphy_read_status_fixed(phydev);
+       if (rc < 0)
+               return rc;
+
+       return rc;
+}
+
+static int lan87xx_config_aneg(struct phy_device *phydev)
+{
+       u16 ctl = 0;
+       int rc;
+
+       switch (phydev->master_slave_set) {
+       case MASTER_SLAVE_CFG_MASTER_FORCE:
+               ctl |= CTL1000_AS_MASTER;
+               break;
+       case MASTER_SLAVE_CFG_SLAVE_FORCE:
+               break;
+       case MASTER_SLAVE_CFG_UNKNOWN:
+       case MASTER_SLAVE_CFG_UNSUPPORTED:
+               return 0;
+       default:
+               phydev_warn(phydev, "Unsupported Master/Slave mode\n");
+               return -EOPNOTSUPP;
+       }
+
+       rc = phy_modify_changed(phydev, MII_CTRL1000, CTL1000_AS_MASTER, ctl);
+       if (rc == 1)
+               rc = genphy_soft_reset(phydev);
+
+       return rc;
+}
+
 static struct phy_driver microchip_t1_phy_driver[] = {
        {
                PHY_ID_MATCH_MODEL(PHY_ID_LAN87XX),
                .handle_interrupt = lan87xx_handle_interrupt,
                .suspend        = genphy_suspend,
                .resume         = genphy_resume,
+               .config_aneg    = lan87xx_config_aneg,
+               .read_status    = lan87xx_read_status,
                .cable_test_start = lan87xx_cable_test_start,
                .cable_test_get_status = lan87xx_cable_test_get_status,
        },
                .config_init    = lan87xx_config_init,
                .suspend        = genphy_suspend,
                .resume         = genphy_resume,
+               .config_aneg    = lan87xx_config_aneg,
+               .read_status    = lan87xx_read_status,
                .cable_test_start = lan87xx_cable_test_start,
                .cable_test_get_status = lan87xx_cable_test_get_status,
        }