rt_sysc_m32(RALINK_PCIE0_CLK_EN, 0, RALINK_CLKCFG1);
                if (ralink_soc == MT762X_SOC_MT7620A)
                        rt_sysc_m32(LC_CKDRVPD, PDRV_SW_SET, PPLL_DRV);
-               dev_err(&pdev->dev, "PCIE0 no card, disable it(RST&CLK)\n");
+               dev_info(&pdev->dev, "PCIE0 no card, disable it(RST&CLK)\n");
                return -1;
        }
 
                        dev->bus->number, slot);
                return 0;
        }
-       dev_err(&dev->dev, "card - bus=0x%x, slot = 0x%x irq=%d\n",
+       dev_info(&dev->dev, "card - bus=0x%x, slot = 0x%x irq=%d\n",
                dev->bus->number, slot, irq);
 
        /* configure the cache line size to 0x14 */