]> www.infradead.org Git - linux.git/commitdiff
riscv: dts: thead: update TH1520 dma and timer nodes to use clock controller
authorDrew Fustini <dfustini@tenstorrent.com>
Thu, 1 Aug 2024 18:38:08 +0000 (11:38 -0700)
committerDrew Fustini <drew@pdp7.com>
Thu, 8 Aug 2024 16:19:46 +0000 (09:19 -0700)
Change the dma-controller and timer nodes to use the APB clock provided
by the AP_SUBSYS clock controller.

Remove apb_clk reference from BeagleV Ahead and LPI4a dts.

Link: https://git.beagleboard.org/beaglev-ahead/beaglev-ahead/-/tree/main/docs
Signed-off-by: Drew Fustini <dfustini@tenstorrent.com>
arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts
arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi
arch/riscv/boot/dts/thead/th1520.dtsi

index 5169a718f79c7e63cf8014f1fc09f41e4d68b482..425f07d73b32f352b5cccd6951e963167ea2d536 100644 (file)
        clock-frequency = <32768>;
 };
 
-&apb_clk {
-       clock-frequency = <62500000>;
-};
-
 &spi_clk {
        clock-frequency = <396000000>;
 };
index be982a3ac18c39f3a006de2084659efcb4a398fc..077dbbe4abb6d45895dd4d23caee478c87de5a2e 100644 (file)
        clock-frequency = <32768>;
 };
 
-&apb_clk {
-       clock-frequency = <62500000>;
-};
-
 &spi_clk {
        clock-frequency = <396000000>;
 };
index f3b2f8236096f95f066d2ac587e932ee18f2b4d3..6ea5cabbcf603ac06e859a09102d9334fae5b61c 100644 (file)
                #clock-cells = <0>;
        };
 
-       apb_clk: apb-clk-clock {
-               compatible = "fixed-clock";
-               clock-output-names = "apb_clk";
-               #clock-cells = <0>;
-       };
-
        spi_clk: spi-clock {
                compatible = "fixed-clock";
                clock-output-names = "spi_clk";
                        compatible = "snps,axi-dma-1.01a";
                        reg = <0xff 0xefc00000 0x0 0x1000>;
                        interrupts = <27 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&apb_clk>, <&apb_clk>;
+                       clocks = <&clk CLK_PERI_APB_PCLK>, <&clk CLK_PERI_APB_PCLK>;
                        clock-names = "core-clk", "cfgr-clk";
                        #dma-cells = <1>;
                        dma-channels = <4>;
                timer0: timer@ffefc32000 {
                        compatible = "snps,dw-apb-timer";
                        reg = <0xff 0xefc32000 0x0 0x14>;
-                       clocks = <&apb_clk>;
+                       clocks = <&clk CLK_PERI_APB_PCLK>;
                        clock-names = "timer";
                        interrupts = <16 IRQ_TYPE_LEVEL_HIGH>;
                        status = "disabled";
                timer1: timer@ffefc32014 {
                        compatible = "snps,dw-apb-timer";
                        reg = <0xff 0xefc32014 0x0 0x14>;
-                       clocks = <&apb_clk>;
+                       clocks = <&clk CLK_PERI_APB_PCLK>;
                        clock-names = "timer";
                        interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
                        status = "disabled";
                timer2: timer@ffefc32028 {
                        compatible = "snps,dw-apb-timer";
                        reg = <0xff 0xefc32028 0x0 0x14>;
-                       clocks = <&apb_clk>;
+                       clocks = <&clk CLK_PERI_APB_PCLK>;
                        clock-names = "timer";
                        interrupts = <18 IRQ_TYPE_LEVEL_HIGH>;
                        status = "disabled";
                timer3: timer@ffefc3203c {
                        compatible = "snps,dw-apb-timer";
                        reg = <0xff 0xefc3203c 0x0 0x14>;
-                       clocks = <&apb_clk>;
+                       clocks = <&clk CLK_PERI_APB_PCLK>;
                        clock-names = "timer";
                        interrupts = <19 IRQ_TYPE_LEVEL_HIGH>;
                        status = "disabled";
                timer4: timer@ffffc33000 {
                        compatible = "snps,dw-apb-timer";
                        reg = <0xff 0xffc33000 0x0 0x14>;
-                       clocks = <&apb_clk>;
+                       clocks = <&clk CLK_PERI_APB_PCLK>;
                        clock-names = "timer";
                        interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
                        status = "disabled";
                timer5: timer@ffffc33014 {
                        compatible = "snps,dw-apb-timer";
                        reg = <0xff 0xffc33014 0x0 0x14>;
-                       clocks = <&apb_clk>;
+                       clocks = <&clk CLK_PERI_APB_PCLK>;
                        clock-names = "timer";
                        interrupts = <21 IRQ_TYPE_LEVEL_HIGH>;
                        status = "disabled";
                timer6: timer@ffffc33028 {
                        compatible = "snps,dw-apb-timer";
                        reg = <0xff 0xffc33028 0x0 0x14>;
-                       clocks = <&apb_clk>;
+                       clocks = <&clk CLK_PERI_APB_PCLK>;
                        clock-names = "timer";
                        interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;
                        status = "disabled";
                timer7: timer@ffffc3303c {
                        compatible = "snps,dw-apb-timer";
                        reg = <0xff 0xffc3303c 0x0 0x14>;
-                       clocks = <&apb_clk>;
+                       clocks = <&clk CLK_PERI_APB_PCLK>;
                        clock-names = "timer";
                        interrupts = <23 IRQ_TYPE_LEVEL_HIGH>;
                        status = "disabled";