ARM: dts: rockchip: Add pwm node for RV1126

Add previously omitted pwm node and possible pinctrl for Rockchip RV1126

Signed-off-by: Karthikeyan Krishnasamy <karthikeyan@linumiz.com>
Link: https://lore.kernel.org/r/20240903105245.715899-4-karthikeyan@linumiz.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi b/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
index c6706fa8bf133a046b2c8dc249fab9801c092aaf..35ef6732281fd9afd9dd3115ab4a34603f782ab1 100644 (file)
--- a/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
+++ b/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi
@@ -225,6 +225,28 @@
                        <3 RK_PB5 3 &pcfg_pull_none>;
                };
        };
+       pwm0 {
+               /omit-if-no-ref/
+               pwm0m0_pins: pwm0m0-pins {
+                       rockchip,pins =
+                               /* pwm0_pin_m0 */
+                               <0 RK_PB6 3 &pcfg_pull_none>;
+               };
+               /omit-if-no-ref/
+               pwm0m1_pins: pwm0m1-pins {
+                       rockchip,pins =
+                               /* pwm0_pin_m1 */
+                               <2 RK_PB3 5 &pcfg_pull_none>;
+               };
+       };
+       pwm1 {
+               /omit-if-no-ref/
+               pwm1m0_pins: pwm1m0-pins {
+                       rockchip,pins =
+                               /* pwm1_pin_m0 */
+                               <0 RK_PB7 3 &pcfg_pull_none>;
+               };
+       };
        pwm2 {
                /omit-if-no-ref/
                pwm2m0_pins: pwm2m0-pins {
@@ -232,6 +254,106 @@
                                /* pwm2_pin_m0 */
                                <0 RK_PC0 3 &pcfg_pull_none>;
                };
+               /omit-if-no-ref/
+               pwm2m1_pins: pwm2m1-pins {
+                       rockchip,pins =
+                               /* pwm2_pin_m1 */
+                               <2 RK_PB1 5 &pcfg_pull_none>;
+               };
+       };
+       pwm3 {
+               /omit-if-no-ref/
+               pwm3m0_pins: pwm3m0-pins {
+                       rockchip,pins =
+                               /* pwm3_pin_m0 */
+                               <0 RK_PC1 3 &pcfg_pull_none>;
+               };
+       };
+       pwm4 {
+               /omit-if-no-ref/
+               pwm4m0_pins: pwm4m0-pins {
+                       rockchip,pins =
+                               /* pwm4_pin_m0 */
+                               <0 RK_PC2 3 &pcfg_pull_none>;
+               };
+       };
+       pwm5 {
+               /omit-if-no-ref/
+               pwm5m0_pins: pwm5m0-pins {
+                       rockchip,pins =
+                               /* pwm5_pin_m0 */
+                               <0 RK_PC3 3 &pcfg_pull_none>;
+               };
+       };
+       pwm6 {
+               /omit-if-no-ref/
+               pwm6m0_pins: pwm6m0-pins {
+                       rockchip,pins =
+                               /* pwm6_pin_m0 */
+                               <0 RK_PB2 3 &pcfg_pull_none>;
+               };
+               /omit-if-no-ref/
+               pwm6m1_pins: pwm6m1-pins {
+                       rockchip,pins =
+                               /* pwm6_pin_m1 */
+                               <2 RK_PD4 5 &pcfg_pull_none>;
+               };
+       };
+       pwm7 {
+               /omit-if-no-ref/
+               pwm7m0_pins: pwm7m0-pins {
+                       rockchip,pins =
+                               /* pwm7_pin_m0 */
+                               <0 RK_PB1 3 &pcfg_pull_none>;
+               };
+               /omit-if-no-ref/
+               pwm7m1_pins: pwm7m1-pins {
+                       rockchip,pins =
+                               /* pwm7_pin_m1 */
+                               <3 RK_PA0 5 &pcfg_pull_none>;
+               };
+       };
+       pwm8 {
+               /omit-if-no-ref/
+               pwm8m0_pins: pwm8m0-pins {
+                       rockchip,pins =
+                               /* pwm8_pin_m0 */
+                               <3 RK_PA4 6 &pcfg_pull_none>;
+               };
+               /omit-if-no-ref/
+               pwm8m1_pins: pwm8m1-pins {
+                       rockchip,pins =
+                               /* pwm8_pin_m1 */
+                               <2 RK_PD7 5 &pcfg_pull_none>;
+               };
+       };
+       pwm9 {
+               /omit-if-no-ref/
+               pwm9m0_pins: pwm9m0-pins {
+                       rockchip,pins =
+                               /* pwm9_pin_m0 */
+                               <3 RK_PA5 6 &pcfg_pull_none>;
+               };
+               /omit-if-no-ref/
+               pwm9m1_pins: pwm9m1-pins {
+                       rockchip,pins =
+                               /* pwm9_pin_m1 */
+                               <2 RK_PD6 5 &pcfg_pull_none>;
+               };
+       };
+       pwm10 {
+               /omit-if-no-ref/
+               pwm10m0_pins: pwm10m0-pins {
+                       rockchip,pins =
+                               /* pwm10_pin_m0 */
+                               <3 RK_PA6 6 &pcfg_pull_none>;
+               };
+               /omit-if-no-ref/
+               pwm10m1_pins: pwm10m1-pins {
+                       rockchip,pins =
+                               /* pwm10_pin_m1 */
+                               <2 RK_PD5 5 &pcfg_pull_none>;
+               };
        };
        pwm11 {
                /omit-if-no-ref/
@@ -240,6 +362,12 @@
                                /* pwm11_pin_m0 */
                                <3 RK_PA7 6 &pcfg_pull_none>;
                };
+               /omit-if-no-ref/
+               pwm11m1_pins: pwm11m1-pins {
+                       rockchip,pins =
+                               /* pwm11_pin_m1 */
+                               <3 RK_PA1 5 &pcfg_pull_none>;
+               };
        };
        rgmii {
                /omit-if-no-ref/

diff --git a/arch/arm/boot/dts/rockchip/rv1126.dtsi b/arch/arm/boot/dts/rockchip/rv1126.dtsi
index f3d278bb4d8f4ee4191b3136caff3b3c69e110cc..434846b85c957faa773e2563bf696249fcce3d5d 100644 (file)
--- a/arch/arm/boot/dts/rockchip/rv1126.dtsi
+++ b/arch/arm/boot/dts/rockchip/rv1126.dtsi
@@ -269,6 +269,28 @@
                status = "disabled";
        };
 
+       pwm0: pwm@ff430000 {
+               compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
+               reg = <0xff430000 0x10>;
+               clock-names = "pwm", "pclk";
+               clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pwm0m0_pins>;
+               #pwm-cells = <3>;
+               status = "disabled";
+       };
+
+       pwm1: pwm@ff430010 {
+               compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
+               reg = <0xff430010 0x10>;
+               clock-names = "pwm", "pclk";
+               clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pwm1m0_pins>;
+               #pwm-cells = <3>;
+               status = "disabled";
+       };
+
        pwm2: pwm@ff430020 {
                compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
                reg = <0xff430020 0x10>;
@@ -280,6 +302,61 @@
                status = "disabled";
        };
 
+       pwm3: pwm@ff430030 {
+               compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
+               reg = <0xff430030 0x10>;
+               clock-names = "pwm", "pclk";
+               clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pwm3m0_pins>;
+               #pwm-cells = <3>;
+               status = "disabled";
+       };
+
+       pwm4: pwm@ff440000 {
+               compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
+               reg = <0xff440000 0x10>;
+               clock-names = "pwm", "pclk";
+               clocks = <&pmucru CLK_PWM1>, <&pmucru PCLK_PWM1>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pwm4m0_pins>;
+               #pwm-cells = <3>;
+               status = "disabled";
+       };
+
+       pwm5: pwm@ff440010 {
+               compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
+               reg = <0xff440010 0x10>;
+               clock-names = "pwm", "pclk";
+               clocks = <&pmucru CLK_PWM1>, <&pmucru PCLK_PWM1>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pwm5m0_pins>;
+               #pwm-cells = <3>;
+               status = "disabled";
+       };
+
+       pwm6: pwm@ff440020 {
+               compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
+               reg = <0xff440020 0x10>;
+               clock-names = "pwm", "pclk";
+               clocks = <&pmucru CLK_PWM1>, <&pmucru PCLK_PWM1>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pwm6m0_pins>;
+               #pwm-cells = <3>;
+               status = "disabled";
+       };
+
+       pwm7: pwm@ff440030 {
+               compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
+               reg = <0xff440030 0x10>;
+               clock-names = "pwm", "pclk";
+               clocks = <&pmucru CLK_PWM1>, <&pmucru PCLK_PWM1>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pwm7m0_pins>;
+               #pwm-cells = <3>;
+               status = "disabled";
+       };
+
        pmucru: clock-controller@ff480000 {
                compatible = "rockchip,rv1126-pmucru";
                reg = <0xff480000 0x1000>;
@@ -323,6 +400,39 @@
                status = "disabled";
        };
 
+       pwm8: pwm@ff550000 {
+               compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
+               reg = <0xff550000 0x10>;
+               clock-names = "pwm", "pclk";
+               clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>;
+               pinctrl-0 = <&pwm8m0_pins>;
+               pinctrl-names = "default";
+               #pwm-cells = <3>;
+               status = "disabled";
+       };
+
+       pwm9: pwm@ff550010 {
+               compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
+               reg = <0xff550010 0x10>;
+               clock-names = "pwm", "pclk";
+               clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>;
+               pinctrl-0 = <&pwm9m0_pins>;
+               pinctrl-names = "default";
+               #pwm-cells = <3>;
+               status = "disabled";
+       };
+
+       pwm10: pwm@ff550020 {
+               compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
+               reg = <0xff550020 0x10>;
+               clock-names = "pwm", "pclk";
+               clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>;
+               pinctrl-0 = <&pwm10m0_pins>;
+               pinctrl-names = "default";
+               #pwm-cells = <3>;
+               status = "disabled";
+       };
+
        pwm11: pwm@ff550030 {
                compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm";
                reg = <0xff550030 0x10>;