ALSA: hda - Enable sync_write for AMD chipset with IDT 92HD8x codecs

The AMD chipset seems unstable in the normal operation mode, and it
seems requring more sensible access for each verb.  Enabling sync_write
mode and allowing bus-reset is a sort of workaround for these chipset
stability issues.

Signed-off-by: Takashi Iwai <tiwai@suse.de>

diff --git a/sound/pci/hda/patch_sigmatel.c b/sound/pci/hda/patch_sigmatel.c
index 05fcd60cc46f79f0d5442f1297639fdf4d3ec79b..c391bfb95e09ee201d8b7de0a4e019c3ccce3d4e 100644 (file)
--- a/sound/pci/hda/patch_sigmatel.c
+++ b/sound/pci/hda/patch_sigmatel.c
@@ -5446,6 +5446,13 @@ static int patch_stac92hd83xxx(struct hda_codec *codec)
        spec->multiout.dac_nids = spec->dac_nids;
        spec->init = stac92hd83xxx_core_init;
 
+       if (codec->bus->pci && codec->bus->pci->vendor == PCI_VENDOR_ID_AMD) {
+               snd_printk(KERN_INFO "idt92hd83xxx: "
+                          "Enable sync_write for AMD chipset\n");
+               codec->bus->sync_write = 1;
+               codec->bus->allow_bus_reset = 1;
+       }
+
        spec->board_config = snd_hda_check_board_config(codec,
                                                        STAC_92HD83XXX_MODELS,
                                                        stac92hd83xxx_models,