#define BNAD_GET_MBOX_IRQ(_bnad)                               \
        (((_bnad)->cfg_flags & BNAD_CF_MSIX) ?                  \
-        ((_bnad)->msix_table[(_bnad)->msix_num - 1].vector) :  \
+        ((_bnad)->msix_table[BNAD_MAILBOX_MSIX_INDEX].vector) : \
         ((_bnad)->pcidev->irq))
 
 #define BNAD_FILL_UNMAPQ_MEM_REQ(_res_info, _num, _depth)      \
        spin_lock_irqsave(&bnad->bna_lock, flags);
        if (bnad->cfg_flags & BNAD_CF_MSIX) {
                irq_handler = (irq_handler_t)bnad_msix_mbox_handler;
-               irq = bnad->msix_table[bnad->msix_num - 1].vector;
+               irq = bnad->msix_table[BNAD_MAILBOX_MSIX_INDEX].vector;
                irq_flags = 0;
                intr_info->intr_type = BNA_INTR_T_MSIX;
-               intr_info->idl[0].vector = bnad->msix_num - 1;
+               intr_info->idl[0].vector = BNAD_MAILBOX_MSIX_INDEX;
        } else {
                irq_handler = (irq_handler_t)bnad_isr;
                irq = bnad->pcidev->irq;
                irq_flags = IRQF_SHARED;
                intr_info->intr_type = BNA_INTR_T_INTX;
-               /* intr_info->idl.vector = 0 ? */
        }
+
        spin_unlock_irqrestore(&bnad->bna_lock, flags);
        sprintf(bnad->mbox_irq_name, "%s", BNAD_NAME);
 
 
                switch (src) {
                case BNAD_INTR_TX:
-                       vector_start = txrx_id;
+                       vector_start = BNAD_MAILBOX_MSIX_VECTORS + txrx_id;
                        break;
 
                case BNAD_INTR_RX:
-                       vector_start = bnad->num_tx * bnad->num_txq_per_tx +
+                       vector_start = BNAD_MAILBOX_MSIX_VECTORS +
+                                       (bnad->num_tx * bnad->num_txq_per_tx) +
                                        txrx_id;
                        break;
 
 
                switch (src) {
                case BNAD_INTR_TX:
-                       intr_info->idl[0].vector = 0x1; /* Bit mask : Tx IB */
+                       intr_info->idl[0].vector = BNAD_INTX_TX_IB_BITMASK;
                        break;
 
                case BNAD_INTR_RX:
-                       intr_info->idl[0].vector = 0x2; /* Bit mask : Rx IB */
+                       intr_info->idl[0].vector = BNAD_INTX_RX_IB_BITMASK;
                        break;
                }
        }
 
        spin_lock_irqsave(&bnad->bna_lock, flags);
        if (bnad->cfg_flags & BNAD_CF_MSIX)
-               irq = bnad->msix_table[bnad->msix_num - 1].vector;
+               irq = bnad->msix_table[BNAD_MAILBOX_MSIX_INDEX].vector;
        else
                irq = bnad->pcidev->irq;
        spin_unlock_irqrestore(&bnad->bna_lock, flags);
 
 
 #define BNAD_VERSION                   "2.3.2.3"
 
+#define BNAD_MAILBOX_MSIX_INDEX                0
 #define BNAD_MAILBOX_MSIX_VECTORS      1
+#define BNAD_INTX_TX_IB_BITMASK                0x1
+#define BNAD_INTX_RX_IB_BITMASK                0x2
 
 #define BNAD_STATS_TIMER_FREQ          1000    /* in msecs */
 #define BNAD_DIM_TIMER_FREQ            1000    /* in msecs */