mt76: mt7615: add missing register initialization

- initialize CCA signal source
- initialize clock for band 1 (7615D)
- initialize BAR rate

Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Felix Fietkau <nbd@nbd.name>

diff --git a/drivers/net/wireless/mediatek/mt76/mt7615/init.c b/drivers/net/wireless/mediatek/mt76/mt7615/init.c
index 280db9445d94de2b6f5e4520f831c0ae3df9cb45..be144e13fe4c8f2ae52e572c9bb234ccd8251dd9 100644 (file)
--- a/drivers/net/wireless/mediatek/mt76/mt7615/init.c
+++ b/drivers/net/wireless/mediatek/mt76/mt7615/init.c
@@ -20,10 +20,24 @@ static void mt7615_phy_init(struct mt7615_dev *dev)
 
 static void mt7615_mac_init(struct mt7615_dev *dev)
 {
-       /* enable band 0 clk */
-       mt76_rmw(dev, MT_CFG_CCR,
-                MT_CFG_CCR_MAC_D0_1X_GC_EN | MT_CFG_CCR_MAC_D0_2X_GC_EN,
-                MT_CFG_CCR_MAC_D0_1X_GC_EN | MT_CFG_CCR_MAC_D0_2X_GC_EN);
+       u32 val;
+
+       /* enable band 0/1 clk */
+       mt76_set(dev, MT_CFG_CCR,
+                MT_CFG_CCR_MAC_D0_1X_GC_EN | MT_CFG_CCR_MAC_D0_2X_GC_EN |
+                MT_CFG_CCR_MAC_D1_1X_GC_EN | MT_CFG_CCR_MAC_D1_2X_GC_EN);
+
+       val = mt76_rmw(dev, MT_TMAC_TRCR0,
+                      MT_TMAC_TRCR_CCA_SEL | MT_TMAC_TRCR_SEC_CCA_SEL,
+                      FIELD_PREP(MT_TMAC_TRCR_CCA_SEL, 2) |
+                      FIELD_PREP(MT_TMAC_TRCR_SEC_CCA_SEL, 0));
+       mt76_wr(dev, MT_TMAC_TRCR1, val);
+
+       val = MT_AGG_ACR_PKT_TIME_EN | MT_AGG_ACR_NO_BA_AR_RULE |
+             FIELD_PREP(MT_AGG_ACR_CFEND_RATE, 0x49) | /* 24M */
+             FIELD_PREP(MT_AGG_ACR_BAR_RATE, 0x4b); /* 6M */
+       mt76_wr(dev, MT_AGG_ACR0, val);
+       mt76_wr(dev, MT_AGG_ACR1, val);
 
        mt76_rmw_field(dev, MT_TMAC_CTCR0,
                       MT_TMAC_CTCR0_INS_DDLMT_REFTIME, 0x3f);

diff --git a/drivers/net/wireless/mediatek/mt76/mt7615/regs.h b/drivers/net/wireless/mediatek/mt76/mt7615/regs.h
index f2cd858730c3cda9ed6f3615edaef4657697315c..c1353deb2b7c89ab1707e1421713fb9e6ed5bfc6 100644 (file)
--- a/drivers/net/wireless/mediatek/mt76/mt7615/regs.h
+++ b/drivers/net/wireless/mediatek/mt76/mt7615/regs.h
@@ -97,12 +97,25 @@
                                        MT_AGG_ARxCR_LIMIT_SHIFT(_n), \
                                        MT_AGG_ARxCR_LIMIT_SHIFT(_n))
 
+#define MT_AGG_ACR0                    MT_WF_AGG(0x070)
+#define MT_AGG_ACR1                    MT_WF_AGG(0x170)
+#define MT_AGG_ACR_NO_BA_RULE          BIT(0)
+#define MT_AGG_ACR_NO_BA_AR_RULE       BIT(1)
+#define MT_AGG_ACR_PKT_TIME_EN         BIT(2)
+#define MT_AGG_ACR_CFEND_RATE          GENMASK(15, 4)
+#define MT_AGG_ACR_BAR_RATE            GENMASK(31, 20)
+
 #define MT_AGG_SCR                     MT_WF_AGG(0x0fc)
 #define MT_AGG_SCR_NLNAV_MID_PTEC_DIS  BIT(3)
 
 #define MT_WF_TMAC_BASE                        0x21000
 #define MT_WF_TMAC(ofs)                        (MT_WF_TMAC_BASE + (ofs))
 
+#define MT_TMAC_TRCR0                  MT_WF_TMAC(0x09c)
+#define MT_TMAC_TRCR1                  MT_WF_TMAC(0x070)
+#define MT_TMAC_TRCR_CCA_SEL           GENMASK(31, 30)
+#define MT_TMAC_TRCR_SEC_CCA_SEL       GENMASK(29, 28)
+
 #define MT_TMAC_CTCR0                  MT_WF_TMAC(0x0f4)
 #define MT_TMAC_CTCR0_INS_DDLMT_REFTIME        GENMASK(5, 0)
 #define MT_TMAC_CTCR0_INS_DDLMT_DENSITY        GENMASK(15, 12)