};
 
 /* msm8998 */
+DEFINE_CLK_SMD_RPM(msm8998, bimc_clk, bimc_a_clk, QCOM_SMD_RPM_MEM_CLK, 0);
 DEFINE_CLK_SMD_RPM(msm8998, pcnoc_clk, pcnoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 0);
 DEFINE_CLK_SMD_RPM(msm8998, snoc_clk, snoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 1);
 DEFINE_CLK_SMD_RPM(msm8998, cnoc_clk, cnoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 2);
 DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8998, rf_clk3, rf_clk3_a, 6);
 DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, rf_clk3_pin, rf_clk3_a_pin, 6);
 static struct clk_smd_rpm *msm8998_clks[] = {
+       [RPM_SMD_BIMC_CLK] = &msm8998_bimc_clk,
+       [RPM_SMD_BIMC_A_CLK] = &msm8998_bimc_a_clk,
        [RPM_SMD_PCNOC_CLK] = &msm8998_pcnoc_clk,
        [RPM_SMD_PCNOC_A_CLK] = &msm8998_pcnoc_a_clk,
        [RPM_SMD_SNOC_CLK] = &msm8998_snoc_clk,