* Copyright 2022 Toradex
  */
 
-/* TODO: Audio Codec */
+/ {
+       sound {
+               compatible = "simple-audio-card";
+               simple-audio-card,bitclock-master = <&codec_dai>;
+               simple-audio-card,format = "i2s";
+               simple-audio-card,frame-master = <&codec_dai>;
+               simple-audio-card,mclk-fs = <256>;
+               simple-audio-card,name = "imx8mp-wm8904";
+               simple-audio-card,routing =
+                       "Headphone Jack", "HPOUTL",
+                       "Headphone Jack", "HPOUTR",
+                       "IN2L", "Line In Jack",
+                       "IN2R", "Line In Jack",
+                       "Headphone Jack", "MICBIAS",
+                       "IN1L", "Headphone Jack";
+               simple-audio-card,widgets =
+                       "Microphone", "Headphone Jack",
+                       "Headphone", "Headphone Jack",
+                       "Line", "Line In Jack";
+
+               codec_dai: simple-audio-card,codec {
+                       clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1>;
+                       sound-dai = <&wm8904_1a>;
+               };
+
+               simple-audio-card,cpu {
+                       sound-dai = <&sai1>;
+               };
+       };
+};
 
 &backlight {
        power-supply = <®_3p3v>;
 &i2c4 {
        status = "okay";
 
-       /* TODO: Audio Codec */
+       /* Audio Codec */
+       wm8904_1a: audio-codec@1a {
+               compatible = "wlf,wm8904";
+               reg = <0x1a>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_sai1>;
+               #sound-dai-cells = <0>;
+               clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1>;
+               clock-names = "mclk";
+               AVDD-supply = <®_1p8v>;
+               CPVDD-supply = <®_1p8v>;
+               DBVDD-supply = <®_1p8v>;
+               DCVDD-supply = <®_1p8v>;
+               MICVDD-supply = <®_1p8v>;
+       };
 };
 
 /* Verdin PCIE_1 */
        vin-supply = <®_3p3v>;
 };
 
-/* TODO: Verdin I2S_1 */
+/* Verdin I2S_1 */
+&sai1 {
+       assigned-clocks = <&clk IMX8MP_CLK_SAI1>;
+       assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
+       assigned-clock-rates = <24576000>;
+       fsl,sai-mclk-direction-output;
+       status = "okay";
+};
 
 /* Verdin UART_1 */
 &uart1 {