hwmgr->dyn_state.uvd_clock_voltage_dependency_table;
        unsigned long clock = 0;
        uint32_t level;
+       int ret;
 
        if (NULL == table || table->count <= 0)
                return -EINVAL;
        data->uvd_dpm.soft_min_clk = 0;
        data->uvd_dpm.hard_min_clk = 0;
 
-       smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMaxUvdLevel, &level);
+       ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMaxUvdLevel, &level);
+       if (ret)
+               return ret;
 
        if (level < table->count)
                clock = table->entries[level].vclk;
                                hwmgr->dyn_state.vce_clock_voltage_dependency_table;
        unsigned long clock = 0;
        uint32_t level;
+       int ret;
 
        if (NULL == table || table->count <= 0)
                return -EINVAL;
        data->vce_dpm.soft_min_clk = 0;
        data->vce_dpm.hard_min_clk = 0;
 
-       smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMaxEclkLevel, &level);
+       ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMaxEclkLevel, &level);
+       if (ret)
+               return ret;
 
        if (level < table->count)
                clock = table->entries[level].ecclk;
                                hwmgr->dyn_state.acp_clock_voltage_dependency_table;
        unsigned long clock = 0;
        uint32_t level;
+       int ret;
 
        if (NULL == table || table->count <= 0)
                return -EINVAL;
        data->acp_dpm.soft_min_clk = 0;
        data->acp_dpm.hard_min_clk = 0;
 
-       smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMaxAclkLevel, &level);
+       ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMaxAclkLevel, &level);
+       if (ret)
+               return ret;
 
        if (level < table->count)
                clock = table->entries[level].acpclk;