Abstract the MQPRIO params into a struct.
Use a getter for DCB mode num_tcs.
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Reviewed-by: Maxim Mikityanskiy <maximmi@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
        u8  rq_wq_type;
        u8  log_rq_mtu_frames;
        u16 num_channels;
-       u8  num_tc;
+       struct {
+               u8 num_tc;
+       } mqprio;
        bool rx_cqe_compress_def;
        bool tunneled_offload_en;
        struct dim_cq_moder rx_cq_moderation;
        bool ptp_rx;
 };
 
+static inline u8 mlx5e_get_dcb_num_tc(struct mlx5e_params *params)
+{
+       return params->mqprio.num_tc;
+}
+
 enum {
        MLX5E_RQ_STATE_ENABLED,
        MLX5E_RQ_STATE_RECOVERING,
 
                                 struct mlx5e_ptp_params *cparams)
 {
        struct mlx5e_params *params = &cparams->params;
+       u8 num_tc = mlx5e_get_dcb_num_tc(params);
        int ix_base;
        int err;
        int tc;
 
-       ix_base = params->num_tc * params->num_channels;
+       ix_base = num_tc * params->num_channels;
 
-       for (tc = 0; tc < params->num_tc; tc++) {
+       for (tc = 0; tc < num_tc; tc++) {
                int txq_ix = ix_base + tc;
 
                err = mlx5e_ptp_open_txqsq(c, c->priv->tisn[c->lag_port][tc], txq_ix,
        struct mlx5e_create_cq_param ccp = {};
        struct dim_cq_moder ptp_moder = {};
        struct mlx5e_cq_param *cq_param;
+       u8 num_tc;
        int err;
        int tc;
 
+       num_tc = mlx5e_get_dcb_num_tc(params);
+
        ccp.node     = dev_to_node(mlx5_core_dma_dev(c->mdev));
        ccp.ch_stats = c->stats;
        ccp.napi     = &c->napi;
 
        cq_param = &cparams->txq_sq_param.cqp;
 
-       for (tc = 0; tc < params->num_tc; tc++) {
+       for (tc = 0; tc < num_tc; tc++) {
                struct mlx5e_cq *cq = &c->ptpsq[tc].txqsq.cq;
 
                err = mlx5e_open_cq(c->priv, ptp_moder, cq_param, &ccp, cq);
                        goto out_err_txqsq_cq;
        }
 
-       for (tc = 0; tc < params->num_tc; tc++) {
+       for (tc = 0; tc < num_tc; tc++) {
                struct mlx5e_cq *cq = &c->ptpsq[tc].ts_cq;
                struct mlx5e_ptpsq *ptpsq = &c->ptpsq[tc];
 
 out_err_ts_cq:
        for (--tc; tc >= 0; tc--)
                mlx5e_close_cq(&c->ptpsq[tc].ts_cq);
-       tc = params->num_tc;
+       tc = num_tc;
 out_err_txqsq_cq:
        for (--tc; tc >= 0; tc--)
                mlx5e_close_cq(&c->ptpsq[tc].txqsq.cq);
        params->num_channels = orig->num_channels;
        params->hard_mtu = orig->hard_mtu;
        params->sw_mtu = orig->sw_mtu;
-       params->num_tc = orig->num_tc;
+       params->mqprio = orig->mqprio;
 
        /* SQ */
        if (test_bit(MLX5E_PTP_STATE_TX, c->state)) {
        c->pdev     = mlx5_core_dma_dev(priv->mdev);
        c->netdev   = priv->netdev;
        c->mkey_be  = cpu_to_be32(priv->mdev->mlx5e_res.hw_objs.mkey.key);
-       c->num_tc   = params->num_tc;
+       c->num_tc   = mlx5e_get_dcb_num_tc(params);
        c->stats    = &priv->ptp_stats.ch;
        c->lag_port = lag_port;
 
 
         */
        bool is_ptp = MLX5E_GET_PFLAG(&chs->params, MLX5E_PFLAG_TX_PORT_TS);
 
-       return (chs->params.num_channels + is_ptp) * chs->params.num_tc + qid;
+       return (chs->params.num_channels + is_ptp) * mlx5e_get_dcb_num_tc(&chs->params) + qid;
 }
 
 int mlx5e_get_txq_by_classid(struct mlx5e_priv *priv, u16 classid)
 
        for (i = 0; i < priv->channels.num; i++) {
                struct mlx5e_channel *c = priv->channels.c[i];
 
-               for (tc = 0; tc < priv->channels.params.num_tc; tc++) {
+               for (tc = 0; tc < mlx5e_get_dcb_num_tc(&priv->channels.params); tc++) {
                        struct mlx5e_txqsq *sq = &c->sq[tc];
 
                        err = mlx5e_tx_reporter_build_diagnose_output(fmsg, sq, tc);
        if (!ptp_ch || !test_bit(MLX5E_PTP_STATE_TX, ptp_ch->state))
                goto close_sqs_nest;
 
-       for (tc = 0; tc < priv->channels.params.num_tc; tc++) {
+       for (tc = 0; tc < mlx5e_get_dcb_num_tc(&priv->channels.params); tc++) {
                err = mlx5e_tx_reporter_build_diagnose_output_ptpsq(fmsg,
                                                                    &ptp_ch->ptpsq[tc],
                                                                    tc);
        for (i = 0; i < priv->channels.num; i++) {
                struct mlx5e_channel *c = priv->channels.c[i];
 
-               for (tc = 0; tc < priv->channels.params.num_tc; tc++) {
+               for (tc = 0; tc < mlx5e_get_dcb_num_tc(&priv->channels.params); tc++) {
                        struct mlx5e_txqsq *sq = &c->sq[tc];
 
                        err = mlx5e_health_queue_dump(priv, fmsg, sq->sqn, "SQ");
        }
 
        if (ptp_ch && test_bit(MLX5E_PTP_STATE_TX, ptp_ch->state)) {
-               for (tc = 0; tc < priv->channels.params.num_tc; tc++) {
+               for (tc = 0; tc < mlx5e_get_dcb_num_tc(&priv->channels.params); tc++) {
                        struct mlx5e_txqsq *sq = &ptp_ch->ptpsq[tc].txqsq;
 
                        err = mlx5e_health_queue_dump(priv, fmsg, sq->sqn, "PTP SQ");
 
 {
        int err, tc;
 
-       for (tc = 0; tc < params->num_tc; tc++) {
+       for (tc = 0; tc < mlx5e_get_dcb_num_tc(params); tc++) {
                int txq_ix = c->ix + tc * params->num_channels;
 
                err = mlx5e_open_txqsq(c, c->priv->tisn[c->lag_port][tc], txq_ix,
        c->pdev     = mlx5_core_dma_dev(priv->mdev);
        c->netdev   = priv->netdev;
        c->mkey_be  = cpu_to_be32(priv->mdev->mlx5e_res.hw_objs.mkey.key);
-       c->num_tc   = params->num_tc;
+       c->num_tc   = mlx5e_get_dcb_num_tc(params);
        c->xdp      = !!params->xdp_prog;
        c->stats    = &priv->channel_stats[ix].ch;
        c->aff_mask = irq_get_effective_affinity_mask(irq);
        qos_queues = mlx5e_qos_cur_leaf_nodes(priv);
 
        nch = priv->channels.params.num_channels;
-       ntc = priv->channels.params.num_tc;
+       ntc = mlx5e_get_dcb_num_tc(&priv->channels.params);
        num_txqs = nch * ntc + qos_queues;
        if (MLX5E_GET_PFLAG(&priv->channels.params, MLX5E_PFLAG_TX_PORT_TS))
                num_txqs += ntc;
        old_ntc = netdev->num_tc ? : 1;
 
        nch = priv->channels.params.num_channels;
-       ntc = priv->channels.params.num_tc;
+       ntc = mlx5e_get_dcb_num_tc(&priv->channels.params);
        num_rxqs = nch * priv->profile->rq_groups;
 
        mlx5e_netdev_set_tcs(netdev, nch, ntc);
        int i, ch, tc, num_tc;
 
        ch = priv->channels.num;
-       num_tc = priv->channels.params.num_tc;
+       num_tc = mlx5e_get_dcb_num_tc(&priv->channels.params);
 
        for (i = 0; i < ch; i++) {
                for (tc = 0; tc < num_tc; tc++) {
 {
        /* Sync with mlx5e_select_queue. */
        WRITE_ONCE(priv->num_tc_x_num_ch,
-                  priv->channels.params.num_tc * priv->channels.num);
+                  mlx5e_get_dcb_num_tc(&priv->channels.params) * priv->channels.num);
 }
 
 void mlx5e_activate_priv_channels(struct mlx5e_priv *priv)
        }
 
        new_params = priv->channels.params;
-       new_params.num_tc = tc ? tc : 1;
+       new_params.mqprio.num_tc = tc ? tc : 1;
 
        err = mlx5e_safe_switch_params(priv, &new_params,
                                       mlx5e_num_channels_changed_ctx, NULL, true);
 
 out:
        priv->max_opened_tc = max_t(u8, priv->max_opened_tc,
-                                   priv->channels.params.num_tc);
+                                   mlx5e_get_dcb_num_tc(&priv->channels.params));
        mutex_unlock(&priv->state_lock);
        return err;
 }
        params->hard_mtu = MLX5E_ETH_HARD_MTU;
        params->num_channels = min_t(unsigned int, MLX5E_MAX_NUM_CHANNELS / 2,
                                     priv->max_nch);
-       params->num_tc       = 1;
+       params->mqprio.num_tc = 1;
 
        /* Set an initial non-zero value, so that mlx5e_select_queue won't
         * divide by zero if called before first activating channels.
         */
-       priv->num_tc_x_num_ch = params->num_channels * params->num_tc;
+       priv->num_tc_x_num_ch = params->num_channels * params->mqprio.num_tc;
 
        /* SQ */
        params->log_sq_size = is_kdump_kernel() ?
 
        int err = -ENOMEM;
        u32 *sqs;
 
-       sqs = kcalloc(priv->channels.num * priv->channels.params.num_tc, sizeof(*sqs), GFP_KERNEL);
+       sqs = kcalloc(priv->channels.num * mlx5e_get_dcb_num_tc(&priv->channels.params),
+                     sizeof(*sqs), GFP_KERNEL);
        if (!sqs)
                goto out;
 
        params->rx_dim_enabled = MLX5_CAP_GEN(mdev, cq_moderation);
        mlx5e_set_rx_cq_mode_params(params, cq_period_mode);
 
-       params->num_tc                = 1;
+       params->mqprio.num_tc       = 1;
        params->tunneled_offload_en = false;
 
        mlx5_query_min_inline(mdev, ¶ms->tx_min_inline_mode);